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SCHEMATIC DIAGRAM - 17
I
C
MAIN(CPU) CIRCUIT
R4355
R4357
10K
R4351
C4351
C4355
C4357
1K
1
1000P
100P
VOUT_SBL
WL_SBL
J
4
3
2
V-
SIGNAL_AGND
5
6
7
R4352
C4352
C4356
C4358
1K
1
1000P
100P
K
VOUT_SBR
WL_SBR
R4356
R4358
10K
10K
L
M
WL_SWITCH
R4435
R4437
10K
10K
N
R4431
C4431
C4435
C4437
1
1000P
100P
1K
VOUT_FL.BUF
R4427
1K
4
3
2
V-
VOUT_C.BUF
O
R4428
5
6
7
1K
R4432
C4432
C4436
C4438
1K
1
1000P
100P
VOUT_FR.BUF
R4436
R4438
10K
10K
P
1
2
3
: +B SIGNAL LINE
: -B SIGNAL LINE
: MAIN SIGNAL LINE
10K
C4359
R4361
R4331
2.2K
25V10
1K
1
3
4
IC4305
C0ABBB000125
2
5
OP-AMP
(WIRELESS SURROUND
1
6
BACK)
V+
Q4305
8
B1GFGCAA0001
MUTING
C4360
R4362
R4332
1K
25V10
2.2K
B1GDCFJJ0008
QR4401
B1GBCFNN0009
INVERTER
C4439
R4441
25V10
2.2K
1
3
4
IC4404
2
5
C0ABBB000125
OP-AMP
(WIRELESS FRONT)
1
6
V+
Q4404
8
B1GFGCAA0001
MUTING
R4442
C4440
25V10
2.2K
4
5
6
: IPOD AUDIO SIGNAL LINE
R4335
R4337
10K
10K
C4331
C4335
C4337
C4339
R4341
1
1000P
100P
25V10
2.2K
WL_SL
4
3
2
1
V-
IC4304
C0ABBB000125
OP-AMP
(WIRELESS SURROUND)
V+
5
6
7
8
C4336
C4338
1000P
100P
WL_SR
C4332
R4342
C4340
R4336
R4338
1
25V10
2.2K
10K
10K
BK+3.3V
QR4304
QR4305
QR4306
MUTING CONTROL
B1GDCFJJ0008
B1GBCFJJ0007
R4345
R4347
2.2K
470
MUTING CONTROL
MUTING CONTROL
QR4403
B1GBCFNN0009
7
6
5
4
3
2
1
INVERTER
VSS
C0JBAS000008
QUADRUPPLE ANALOG SWITCH
VDD
QR4402
8
9
10
11
12
13
14
B1GDCFNN0007
INVERTER
7
8
9
101
TO MAIN(CPU)
SECTION (1/4)
AU: MAIN(AUDIO): SCHEMATIC DIAGRAM 11 - 14
CP: MAIN(CPU): SCHEMATIC DIAGRAM 15 - 18
3
4
2
5
1
6
Q4304
B1GFGCAA0001
MUTING
DGND
H.MUTE
WM_SM1
BK+3R3V
WM_INT
nHDMI_MUTE
WM_SSB
WM_SCL
WM_SDO
WM_SDI
WM_DET
WL_D5GND
WL_D5V
C8405
6.3V1200
WL_MR.SR
A-7.5V
R8404
1K
R8403
WL_AGND
1K
WL_MR.SL
R8402
1K
WL_SBROUT
WL_MR.SL
R8401
1K
WL_SBLOUT
WL_SLOUT
R8408
1K
R8407
1K
IC4405
WL_AGND
A+7.5V
WL_MR.SR
WL_SROUT
1/4
2/4
3/4
4/4
SA-BX500EB/EE/EG
10
11
12
SA-BX500EB / SA-BX500EE / SA-BX500EG
TO MAIN(CPU)
SECTION (4/4)
P1
1
PB8005
1
22
SM1
21
SM0
20
INT
19
SSB
18
SCL
17
SDI
16
SDO
15
WM_DET
L
14
PGND
TO
13
+5V
WIRELESS ADAPTER
CH2_R_OUT
CIRCUIT (CN6301)
12
IN SCHEMATIC
11
AGND
CH2_L_OUT
DIAGRAM - 24
10
9
AGND
8
CH1_R_OUT
7
AGND
6
CH1_L_OUT
5
AGND
4
CH3_R_OUT
3
AGND
CH3_L_OUT
2
1
AGND
22
MAIN(CPU) CIRCUIT
13
14
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