Power Monitor Mapping - Texas Instruments DRA72 Series User Manual

Hardware
Table 14 shows a mapping of the current monitoring system. INA226 are located at each shunt location.
I2C Addr Power Net
0x40 SMPS1_IN
0x41 SMPS2_IN
0x42 SMPS3_IN
0x43 SMPS4_IN
0x44 SMPS5_IN
0x45 J6_VDD_MPU
0x46 J6_VDD_GPU
0x47 J6_VDD_CORE
0x48 J6_VDD_1V8
0x49 EVM_VDD_1V8
0x4A J6_VDD_DDR
0x4B EVM_VDD_DDR
I2C Addr Power Net
0x40 VDDSHV8
0x41 VDDSHV5
0x42 VDDA_PHY
0x43 VDDA_USB3v3
0x44 VDDA_PLL
0x45 EVM_5v0
0x46 EVM_3v3
0x47 VCCA_IN
0x48 EVM_12V
0x49 1v8_PHY2
18
DRA72x EVM CPU Board User's Guide
Table 14. Power Monitor Mapping
I2C BUS A
Shunt / Description
Resistor
5m-Ω TPS65917 SMPS1 power input (MPU)
10m-Ω TPS65917 SMPS1 power input (GPU/DSP)
10m-Ω TPS65917 SMPS1 power input (CORE)
10m-Ω TPS65917 SMPS1 power input (1V8)
10m-Ω TPS65917 SMPS1 power input (DDR)
10m-Ω CPU MPU power rail (TPS65917 SMPS1)
10m-Ω CPU GPU/DSP/IVA (TPS65917 SMPS2)
10m-Ω CPU CORE power rail (TPS65917 SMPS3)
10m-Ω CPU 1v8 power rail(s)
10m-Ω EVM 1v8 Peripheral Rail
10m-Ω CPU DDR Power Rail
10m-Ω DDR Power Rail
I2C BUS B
Shunt / Description
Resistor
10m-Ω CPU IO Rail for SD/MMC
10m-Ω CPU IO Rail for RTC
10m-Ω CPU PHY LDO Rail
10m-Ω CPU USB PHY LDO Rail
10m-Ω CPU PLL LDO Rail
10m-Ω EVM 5v0 Peripheral Rail
10m-Ω EVM 3v3 Peripheral Rail
10m-Ω Total System power rail
10m-Ω Total System 12v power rail
10m-Ω CPU PHY LDO Rail
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SPRUIB9 – December 2016
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