Advanced Chipset Features - Biostar M6VLR User Manual

Chapter 2

2.4 Advanced Chipset Features

This submenu allows you to configure the specific features of the chipset installed on
your system. This chipset manages bus speeds and access to system memory
resources, such as DRAM and external cache. It also coordinates communications
with the PCI bus. The default settings that came with your system have been
optimized and therefore should not be changed unless you are suspicious that the
settings have been changed incorrectly.
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Figure 4. Advanced Chipset Setup
Bank Interleave
This item allows you to enable or disable the bank interleave feature.
The Choices: Disabled (default), 2Bank, 4Bank.
DRAM Clock
When synchronous DRAM is installed, the number of clock cycles of CAS
latency depends on the DRAM timing.
The Choices: By SPD (default), HCLK-33M, HCLK+33M, Host CLK.
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BIOS Setup