Advanced Chipset Features - Biostar M6VLA User Manual

Chapter 2

2.4 Advanced Chipset Features

This section allows you to configure the system based on the specific features of
the installed chipset. This chipset manages bus speeds and access to system
memory resources, such as DRAM and the external cache. It also coordinates
communications between the conventional PCI bus. It must be stated that these
items should never need to be altered. The default settings have been chosen
because they provide the best operating conditions for your system. The only time
you might consider making any changes would be if you discovered that data was
being lost which using your system.
CMOS Setup Utility-Copyright (C) 1984-2000 Award Software
DRAM Clock
Memory Hole
Video RAM Cacheable
Frame Buffer Size
AGP Aperture Size
OnChip USB
USB Keyboard Support
OnChip Sound
OnChip Modem
:Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values
Figure 4. Advanced Chipset Feature
DRAM Clock
When synchronous DRAM is installed, the number of clock cycles of CAS
latency depends on the DRAM timing.
The Choices: Host CLK (default), HCLK-33M, By SPD.
Memory Hole
When enabled, you can reserve an area of system memory for ISA adapter ROM.
When this area is reserved, it cannot be cached. Refer to the user documentation
of the peripheral you are installing for more information.
The Choices: Disabled (default), 15M-16M.
Advanced Chipset Features
Host CLk
Disabled
Disabled
8M
Menu Level
64M
Enabled
Disabled
Auto
Auto
F6:Fail-Safe Defaults F7:Optimized Defaults
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BIOS Setup
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