Sony HCD-DH50R Service Manual page 55

Pin No. Pin Name
66 XWR
67 to 75 HA16 to HA9, HA20
76 XROMCS
77 HA1
78 XRD
79, 80 HD0, HD1
81 DVSS
82 to 86 HD2 to HD6
87 HA21
88 RESERVED
89 HD7
90 DVSS
91, 92 HA17, HA0
93 DVDD18
94 FWD
95 REV
96 DVDD3
97 IFSDO
98 IFCK
99 xIFCS
100 IFSDI
101 SCL
102 SDA
103 CKSW
104 OCSW
105 RXD
106 TXD
107 ICE
108 xSYSRST
109 RESERVED
110 xIFBSY
111 DQM0
112 EEWP
113 to
RD7 to RD3
117
118 DVDD3
119 to RD2 to RD0,
129 RD15 to RD8
130 TSD_M
131 DVDD3
132 DQM1
133 _RWE
134 _CAS
135 _RAS
136 _RCS
137, 138 BA0, BA1
139 to
RA10, RA0, RA1
141
142 DVDD18
143, 144 RA2, RA3
145 DVDD3
146 DRCLK
147 CKE
148 DVSS
149 to
RA11, RA9 to RA4
155
156 DVDD3
157 MUTE123
158 MUTE
159 DDC_DA
I/O
O Write enable signal output to the fl ash ROM
O Address signal output to the fl ash ROM
O Chip select signal output to the fl ash ROM
O Address signal output to the fl ash ROM
O Read enable signal output to the fl ash ROM
I/O Two-way data bus with the fl ash ROM
- Ground terminal
I/O Two-way data bus with the fl ash ROM
O Address signal output to the fl ash ROM
- Not used
I/O Two-way data bus with the fl ash ROM
- Ground terminal
O Address signal output to the fl ash ROM
- Power supply terminal (+1.8V)
O Loading motor drive signal output terminal (forward direction)
O Loading motor drive signal output terminal (reverse direction)
- Power supply terminal (+3.3V)
O Serial data output to the system controller
O Serial data transfer clock signal output to the system controller
O Chip select signal output to the system controller
I Serial data input from the system controller
O Serial data transfer clock signal output to the EEPROM
I/O Two-way data bus with the EEPROM
I Chucking detection switch input terminal
I Disc slot in/out detection switch input terminal
I Receive data input terminal for UART communication when data writing to fl ash memory
O Transmit data output terminal for UART communication when data writing to fl ash memory
I ICE mode enable signal input terminal
I Reset signal input from the system controller
- Not used
I Busy request signal input from the system controller
O Data mask signal output to the SD-RAM
O Write protect signal output to the EEPROM
I/O Two-way data bus with the SD-RAM
- Power supply terminal (+3.3V)
I/O Two-way data bus with the SD-RAM
O Thermal shut down signal output to the motor/coil driver
- Power supply terminal (+3.3V)
O Data mask signal output to the SD-RAM
O Write enable signal output to the SD-RAM
O Column address strobe signal output to the SD-RAM
O Row address strobe signal output to the SD-RAM
O Chip select signal output to the SD-RAM
O Bank address signal output to the SD-RAM
O Address signal output to the SD-RAM
- Power supply terminal (+1.8V)
O Address signal output to the SD-RAM
- Power supply terminal (+3.3V)
O Serial data transfer clock signal output to the SD-RAM
O Clock enable signal output to the SD-RAM
- Ground terminal
O Address signal output to the SD-RAM
- Power supply terminal (+3.3V)
O Muting signal output to the motor/coil driver
O Muting signal output to the motor/coil driver
I/O Two-way I2C data bus with the HDMI OUT connector
HCD-DH50R/DH70SWR
Description
"L": disc slot in
Not used
"L": reset
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