Sony HCD-DH50R Service Manual page 52

HCD-DH50R/DH70SWR
– JACK Board –
IC251 TC9488FG
30 29 28 27
VREF
DAC S/H
ADPCM DELAY
DECODE DRAM
OSC
1 2 3 4
– POW-SUPPLY Board –
IC601 MIP2F20MS1SO
VDD 1
CLAMP CIRCUIT
(ILIMIT SETTING)
FB 2
VCL
CL 3 IN
VCL.OUT
ICL.LOW
ILIMIT VARIABLE
CIRCUIT
VCC OVP
+
2.4V –
OVERHEAT
PROTECTION
VCC UV
+
7.2V –
VCC 4
52
26 25 24 23 22
VREF
POST
LPF
ADPCM
ADC
ENCODE
VOLUME CONTROL
5 6 7 8 9
CONSTANT
CURRENT
SOURCE
FOR LIGHT LOAD
DETECTION INTERMITTENT
OSCILLATION CONTROL
+
27%
–
22%
GENERATOR
CLOCK
12kHz
MAXDC
S Q
R Q
RESTARTING
TRIGGER
VDD UV
+
5.7V
–
5.0V
REGULATOR
21 20 19 18 17
ALC
VREF
ALC
10 11 12 13 14
6.6V
VDD CLAMP
ILIMIT
CIRCUIT
CORRECTION
CIRCUIT
AT TURNING ON
R
Q BLANKING PULSE
GENERATION CIRCUIT
S Q
5.7V
16
VREF
VREF
15
8 SOURCE
7 SOURCE
–
+
FOR
DRAIN CURRENT
DETECT
GATE DRIVER
POWER
MOSFET
5 DRAIN