JVC GZ-MG40US Schematic Diagrams page 9

5 4
1 2 3
R1077
1M
74 73 92 25 100 99 98 18 37 11 8
IC1001
MN102H60GJA
42 12 82 19 20 21 24 23 40 86 87
3 2 1
X1001
NAX0784-001X
IONS".
R1046
OPEN
S 3
G
2
Q1005
D 1
2SJ347-X
7 59 57 61 66 34 43 54
I_MTR 45
KEY_C 46
KEY_B 64
KEY_A 63
ZOOM_SW 47
UNREGCHK
62
T_BATT 44
V_BATT 65
RTC_INT 96
NT_PAL 48
AFE_RST 16
DSP_RST 29
ZEROG_H 26
CHRGLED 81
ACESLED 60
REMOTE 58
C1001
0.1
VDD 83
3AAZEROG 53
ZEROZINT 77
OSD_VD 78
ADP_L 36
BATT_H 80
LCD_OPEN 33
INFO_SW 38
JLIP_INT 76
NMI 75
85 4 41 3
I_MTR
KEY_CCH
KEY_BCH
KEY_ACH
ZOOMSW
UNREGCHK
T_BATT
R1065
1k
V_BATT
R1043
100k
TVSEL
ZEROG_H
CHRGLED
ACESLED
IR_RMC
R1086
0R0
3AAZEROG OSD_CS
R1066 1k ADP_L
BATT_H
MONI_SW
INFOSW
R1037 TO MAIN IF(CN101)
1k
PDET
P_DET
R1045
1k
SDET
S_DET
TO P.PRCS
SYSSEL0
SYSSEL0
SYSSEL1
SYSSEL1
TVSEL
R1068 TVSEL
SCPU_CS
100k
SCPU_CS
SCPU_SCK
SCPU_SCK
SCPU_SO
SCPU_SO
SCPU_SI
SCPU_SI
EEPRM_CS
EEPRM_CS
EEPRM_CK
EEPRM_CK
EEPRM_DO
EEPRM_DO
EEPRM_DI
EEPRM_DI
AFE_RST
R1071
100k
V27_OUT
V27_OUT
TO TG133
TG2_RST
TG2_RST
TO DSP MEM
FLSH_RST
FLSH_RST
TO DSP
ZEROG_H
TO V I/O,DSP
DSP_RST
TO V I/O
OSD_CS
OSD_VD
TO V I/O
ANA_RST
ANA_RST
ANA_CS
ANA_CS
TO MAIN IF
ANA_CLK
(CN101),
ANA_CLK
ANA_OUT
V I/O,
ANA_OUT
AUDIO
ANA_IN
ANA_IN
TO V I/O
PSCTL
PSCTL
y10563001a_rev0.1
(No.YF109)2-8