Pioneer PDP-5071PU Service Manual
Pioneer PDP-5071PU Service Manual

Pioneer PDP-5071PU Service Manual

Plasma display system
Table of Contents

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PLASMA DISPLAY SYSTEM
PDP-5071PU
PDP-5070PU
THIS MANUAL IS APPLICABLE TO THE FOLLOWING MODEL(S) AND TYPE(S).
Model
Type
PDP-5071PU
KUCXC
PDP-5070PU
KUCXC
This service manual should be used together with the following manual(s).
Model No.
PDP-5071PU, PDP-5070PU
For details, refer to "Important Check Points for good servicing".
PIONEER CORPORATION
PIONEER ELECTRONICS (USA) INC. P.O. Box 1760, Long Beach, CA 90801-1760, U.S.A.
PIONEER EUROPE NV Haven 1087, Keetberglaan 1, 9120 Melsele, Belgium
PIONEER ELECTRONICS ASIACENTRE PTE. LTD. 253 Alexandra Road, #04-01, Singapore 159936
PIONEER CORPORATION 2006
Power Requirement
AC 120 V
AC 120 V
Order No.
ARP3355
SCHEMATIC DIAGRAM, PCB CONNECTION DIAGRAM
4-1, Meguro 1-chome, Meguro-ku, Tokyo 153-8654, Japan
PDP-5071PU
Remarks
ORDER NO.
ARP3354
Remarks
T-IZV AUG. 2006 printed in Japan

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Summary of Contents for Pioneer PDP-5071PU

  • Page 1 PIONEER CORPORATION 4-1, Meguro 1-chome, Meguro-ku, Tokyo 153-8654, Japan PIONEER ELECTRONICS (USA) INC. P.O. Box 1760, Long Beach, CA 90801-1760, U.S.A. PIONEER EUROPE NV Haven 1087, Keetberglaan 1, 9120 Melsele, Belgium PIONEER ELECTRONICS ASIACENTRE PTE. LTD. 253 Alexandra Road, #04-01, Singapore 159936 PIONEER CORPORATION 2006 T-IZV AUG.
  • Page 2: Notes On Service Visit

    Therefore, the following checks should be performed for the continued protection of the customer and servicetechnician. PDP-5071PU...
  • Page 3 PRODUCT SAFETY NOTICE With the AC plug removed from an AC power source, place a Many electrical and mechanical parts in PIONEER set have jumper across the two plug prongs. Turn the AC power switch on. special safety related characteristics. These are often not evident...
  • Page 4 Charged Section. 50 SCAN B Assy 50 Y SUB DRIVE Assy 50 X SUB DRIVE Assy Conductive plate X 50 SCAN A Assy 50 Y MAIN DRIVE Assy 50 X MAIN DRIVE Assy Fig.1 High Voltage Generating Point (Rear view) PDP-5071PU...
  • Page 5 To protect products from damages or failures during transit, the shipping mode should be set or the shipping screws should be installed before shipment. Please be sure to follow this method especially if it is specified in this manual. PDP-5071PU...
  • Page 6: Quick Reference Upon Service Visit

    "OFF" to "ANA AD YCBCR". 3. You can change Mask patterns by pressing [«] to select {SG PATTERN} then using [|] or [\]. Note: When you switch "SG MODE" routes, some displays become monochrome, as they are in Y-signal only mode. PDP-5071PU...
  • Page 7 2. CMB MASK 01 For use while Combination Mask is displayed. • • • • • Use [»] or [«] to select the type of mask. To "Structure of Layers in Panel Factory Mode 2" 11. CMB MASK 10 PDP-5071PU...
  • Page 8: Table Of Contents

    5.1.6 FLOWCHART OF FAILURE ANALYSIS FOR THE VIDEO SYSTEM..........91 5.1.7 FLOWCHART OF FAILURE ANALYSIS FOR THE AUDIO SYSTEM ..........97 5.2 POWER DOWN ............................. 101 5.2.1 BLOCK DIAGRAM OF THE POWER-DOWN SIGNAL..............101 5.2.2 POWER DOWN OF FAILURE ANALYSIS ..................102 5.3 SHUT DOWN ............................104 PDP-5071PU...
  • Page 9 10.3 POWER ON/OFF FUNCTION FOR THE LARGE-SIGNAL SYSTEM ..........186 10.4 LED INFORMATION ..........................187 10.5 SPECIFICATION ABOUT THE THERMAL PROTECTION..............188 10.6 PROCESSING IN ABNORMALITY ......................189 10.7 TRAP SW..............................190 11. SPECIFICATIONS ............................191 11.1 MAIN SPECIFICATIONS ........................191 11.2 ACCESSORIES............................192 11.3 PANEL FACILITIES..........................193 12. IC INFORMATION ............................196 PDP-5071PU...
  • Page 10: Exploded Views And Parts List

    For the applying amount of lubricants or glue, follow the instructions in this manual. (In the case of no amount instructions, apply as you think it appropriate.) 2.1 PACKING SECTION Noise filter for antenna cable 13, 15, 18 Binder for noise filter Speed clamp ×3 Bead band ×3 PDP-5071PU...
  • Page 11 (English, French, Spanish) Polyethylene Bag S AHG1395 Caution Card ARM1239 Cleaning Caution (U) ARM1303 (2) CONTRAST TABLE PDP-5071PU/KUCXC and PDP-5070PU/KUCXC are constructed the same except for the following: PDP-5071PU PDP-5070PU Mark Symbol and Description /KUCXC /KUCXC Simpled Remote Control Unit...
  • Page 12: Rear Section

    2.2 REAR SECTION MAIN CN4010 MAIN TANSHI CN8801 Refer to "2.3 FRONT SECTION". PDP-5071PU...
  • Page 13 Screw BPZ30P080FTB Bolt Caution Label AAX3075 Screw TBZ40P080FTB NSP 20 Serial Seal AAX3182 (2) CONTRAST TABLE PDP-5071PU/KUCXC and PDP-5070PU/KUCXC are constructed the same except for the following: PDP-5071PU PDP-5070PU Mark Symbol and Description /KUCXC /KUCXC Name Label AAL2766 AAL2810 PDP-5071PU...
  • Page 14: Front Section

    2.3 FRONT SECTION Refer to "2.4 CHASSIS SECTION (1)". MAIN CN4006 MAIN CN4010, CN4006 PDP-5071PU...
  • Page 15 Mark No. Description Part No. 50 LED Assy AWW1135 LED IR Assy AWW1136 Front Case Assy (507PU) AMB2917 Corner Cushion AEB1416 Pioneer Name Plate AAM1098 Coil Spring ABH1120 Blind Cushion AEB1415 Nyron Rivet AEC1671 Screw Rivet AEC1877 Insulation Sheet A...
  • Page 16: Chassis Section (1/2)

    2.4 CHASSIS SECTION (1/2) Refer to "2.7 MULTI BASE SECTION". Cleaning liquid : GEM1004 Cleaning paper : GED-008 MAIN CN4009 POWER POWER AC inlet Refer to "2.5 CHASSIS SECTION (2)". PDP-5071PU...
  • Page 17 Floating Rubber 80 AEB1427 PCB Spacer AEC1570 Wire Saddle AEC1745 Ferrite Core Holder AEC1818 Re-use Wire Saddle AEC1945 • • • • • Screw ABA1313 Screw ABZ30P080FTC Screw AMZ30P060FTB Screw APZ30P080FTB Screw BBZ30P060FTC Screw BPZ30P080FTB Screw TBZ40P080FTB Screw ABA1364 PDP-5071PU...
  • Page 18: Chassis Section (2/2)

    2.5 CHASSIS SECTION (2/2) MAIN 8, 31 CN4001 8, 31 8, 31 8, 31 AUDIO CN3751 8, 31 MAIN CN4002 MAIN CN4008 Power AC inlet switch Refer to "2.6 PANEL CHASSIS SECTION". PDP-5071PU...
  • Page 19 Power Supply Sheet B (507) AMR3555 Address Sheet A AMR3628 Address Sheet B AMR3629 Address Sheet E AMR3645 Address Sheet F AMR3646 Power Supply Sheet (507) AMR3634 Gasket AV8 ANK1881 Rivet A BEC1158 • • • • • Screw ABA1313 Screw ABA1364 PDP-5071PU...
  • Page 20: Panel Chassis Section

    2.6 PANEL CHASSIS SECTION PDP-5071PU...
  • Page 21 50 ADDRESS S Assy AWW1142 NSP 5 50 SCAN A Assy AWW1147 NSP 6 50 SCAN B Assy AWW1148 Re-use PCB Spacer AEC2088 NSP 8 Adhesive Tape (50) AEH1119 Conductive Plate Holder AMR3446 Screw ABA1351 NSP 11 Tube Cover AMR3445 PDP-5071PU...
  • Page 22: Multibase Section

    2.7 MULTIBASE SECTION 50 DIGITAL CN3001 POWER SIDE KEY CN9501 LED IR CN9701 POWER (side) 50 LED CN9651 POWER POWER SIDE CN9101 PDP-5071PU...
  • Page 23 AEC1981 Ferrite Clamp AEC1986 Locking Card Spacer AEC2019 • • • • • POD Cover AMR3542 Multi Base (U) Assy ANA1951 Terminal Panel A (U/B) ANC2394 POD Stay A ANG2933 Tuner Stay U ANG3028 • • • • • PDP-5071PU...
  • Page 24: Pdp Service Assy 507 (Awu1212)

    This spacer is used for attaching the Gasket AV8, and is not included in the Assy for service. Remove the 6 PCB Spacers from the product to be repaired and attach them to the Assy for service. ×4 (for transport) PDP-5071PU...
  • Page 25 AMR3628 Protect Sheet AHG1331 Address Sheet F AMR3646 Screw ABZ30P080FTC DC Sheet A ( * ) AMR3612 Screw APZ30P080FTB Address Sheet E ( * ) AMR3621 Address Sheet D ( * ) AMR3631 Gasket E ( * ) ANK1874 PDP-5071PU...
  • Page 26 2.9 TABLE TOP STAND TABLE TOP STAND PARTS LIST Mark No. Description Part No. NSP 1 Stand Pipe Assy AXY1141 NSP 2 Base Cover Assy AXY1142 Bolt (HEX) ABA1358 Bolt (HEX) ABA1359 Screw ABA1360 PDP-5071PU...
  • Page 27: Pcb Parts List

    [DIGITAL IF BLOCK] IC3304 PST3610UR MISCELLANEOUS Q3301 RN1901 F3001 CCG1162 CN3001 50P CONNECTOR AKM1353 Q3302 HN1C01FU CN3002 20P FFC CONNECTOR AKM1235 MISCELLANEOUS RESISTORS X3302 ASS1188 R3007, 3010–3016 RAB4C470J CN3301 CONNECTOR CKS4835 R3020–3022 RAB4C103J Other Resistors RS1/16SS###J RESISTORS R3307, 3308 RAB4C101J PDP-5071PU...
  • Page 28 UDZS5R6(B) MISCELLANEOUS D1102 CRH01 U3601 DD CON UNIT AXY1137 D1104 UDZS15(B) RESISTORS MISCELLANEOUS R3611 RAB4C101J L1101 ATH1217 Other Resistors RS1/16SS###J L1106 ATH1216 F1101 CTF1449 CAPACITORS 1101 ANH1653 C3609 CKSSYB104K10 1102 AEH1092 C3611 CKSQYB105K16 C3612 ACH1394 1103 BMZ30P080FTC C3613 CKSSYB103K16 PDP-5071PU...
  • Page 29 C1308, 1401, 1407 CEHAT101M25 R1219, 1228, 1230, 1231 RS1/10S0R0J C1310, 1313, 1402 CKSYB105K25 R1220, 1224, 1233, 1256 RS1/10S2R2J C1311 ACH1451 R1237 RS1/10S0R0J C1312, 1403 CKSRYB103K50 R1239 ACN1258 C1314 CEHAT100M50 R1245 ACN1257 C1404 ACG1105 R1247, 1248 RS3LMF470J Other Resistors RS1/16S###J PDP-5071PU...
  • Page 30 C2005, 2006 CCSRCH331J50 Q2261 DTC143EK C2007 CCSRCH680J50 Q2262 DTC123TKA D2201, 2202, 2204, 2209 CRH01 D2203, 2225 1SS355 [50Y RESONANCE BLCOK] D2205, 2206 1SS302 SEMICONDUCTORS IC2101, 2104 TND307TD D2207 CRF03 IC2102 PS9117P D2208, 2212 UDZS5R6(B) IC2106 PS2701A-1(L) D2210, 2213, 2216 CRH01 PDP-5071PU...
  • Page 31 Q2501, 2506, 2511 2SD1898 C2271, 2276 CKSRYB104K25 Q2502, 2507 2SA1576A Q2503, 2515 DTC143EUA [DRIVE HEAT SINK M] Q2504, 2509, 2513 HN1C01FU MISCELLANEOUS Q2505 2SC2713 3001, 3001 ANH1656 Q2508 2SA2005 3001 ANH1656 Q2510 2SA1163 3101, 3101 ANG2679 3101 ANG2679 Q2512, 2514 2SC4081 PDP-5071PU...
  • Page 32 CN4013 12P FFC CONNECTOR AKM1233 R2624 RAB4C220J CN4018 3P CONNECTOR AKM1213 R2631 RS1/10S0R0J Other Resistors RS1/16S###J RESISTORS R4001 RAB4CQ470J CAPACITORS R4002, 4018 RS1/16S102J C2601, 2623 CEHAT101M10 R4012, 4017, 4048 RS1/16S75R0F C2602, 2603, 2611–2617 CKSRYB104K16 R4016 RS1/16S0R0J C2621, 2622 ACH1450 R4021–4024 BCN1067 PDP-5071PU...
  • Page 33 C4109, 4111, 4116, 4119 DCH1201 C4447 ACG1122 C4110, 4117 CCSSCH101J50 C4452 ACH1417 C4112 CCG1232 C4453 ACH1418 C4113, 4128 CKSSYB103K16 C4455 CKSSYB104K10 C4114 BCG1050 C4456 CKSRYB102K50 C4120, 4121, 4135, 4156 CKSSYB104K10 C4457 CCSSCH120J50 C4122 CCSSCH220J50 C4458 CCSSCH101J50 C4124, 4126 DCH1165 PDP-5071PU...
  • Page 34 R5310, 5311 RS1/10S0R0J C4770 CKSRYB105K10 Other Resistors RS1/16S###J CAPACITORS [RGB SW BLOCK(U)] SEMICONDUCTORS C5301 CKSSYB823K10 C5302 CKSSYB822K16 IC4901 R2S11001FT C5303–5305 CKSSYB473K16 Q4901–4904 2SA1586 C5307–5316, 5318, 5319 CKSSYB104K10 RESISTORS R4914 RAB4CQ102J [HDMI BLOCK(U)] R4932 RS1/16S5600F SEMICONDUCTORS R4934 RS1/16S1800F IC5401 SII9023CTU PDP-5071PU...
  • Page 35 Other Resistors RS1/16SS###J [DTUNER BLOCK(U)] SEMICONDUCTORS CAPACITORS IC6001 MCP3021A5-I/OTG C6101, 6103, 6105 CCSSCH270J50 IC6002, 6003 UPC3219GV C6102 CCSSCH100D50 IC6004, 6005 MM1565AF C6104 CCSSCH120J50 Q6001 DTC124EUA C6106 CCSSCH560J50 Q6002 2SC4116 C6107 CKSSYB271K50 Q6003–6005 2SC5084 C6108, 6109, 6115–6120 CKSSYB103K16 Q6006 BB504CDS PDP-5071PU...
  • Page 36 C6801–6803 DCH1201 C6360, 6362, 6365, 6366 CKSSYB102K50 C6367, 6368 CKSSYB104K10 [7038 FLASH BLOCK(U)] C6369 DCH1201 SEMICONDUCTORS IC6901 TC7WH02FU [7038_1 BLOCK(U)] IC6902 AGC1008 SEMICONDUCTORS IC6903 BR24L64F-W Q6901 2SA1586 Q6401 RN1901 Q6902 UMD2N MISCELLANEOUS Q6903 2SC4116 F6401–6412 VTF1084 D6902, 6903 UDZS4R7(B) PDP-5071PU...
  • Page 37 VKS1001 RESISTORS R7305, 7317, 7333–7335 RAB4CQ470J CN7101 CONNECTOR AKM1276 R7323, 7339, 7342 BCN1067 R7336, 7338, 7343 RAB4CQ103J RESISTORS R7337, 7341 RAB4CQ470J R7103, 7119 RS1/16SS2402F R7340 RAB4CQ0R0J R7104, 7118 RS1/16SS1002F R7107, 7109 RAB4CQ103J R7344–7346 BCN1067 R7110 RAB4CQ101J Other Resistors RS1/16SS###J PDP-5071PU...
  • Page 38 BTX1042 L8101–8104 BTX1042 F8101 ATX1058 RESISTORS RESISTORS R7502–7504 RS1/4S1R5J R7505, 7506 RS1/4S3R3J R8101–8104, 8106–8110 BCN1067 R7507, 7508 RS1/10S271J R8105 BCN1071 R7511, 7538 RS1/16SS2202F R8111, 8116 ACN1246 R7530 RS1/16SS5102F R8112–8115, 8117 ACN1251 R8123 RAB4CQ103J R7531 RS1/16SS8201F R7532 RS1/16SS9101F R8135 RAB4CQ470J PDP-5071PU...
  • Page 39 JA8806 JACK VKN1449 JA8807 PIN JACK (9P3S) AKB1334 R8322 RAB4CQ473J R8348–8352 RAB4CQ103J JA8808, 8809 3P VERTICAL PIN JACK AKB1332 Other Resistors RS1/16SS###J JA8811 4 POLE MINI JACK AKN1081 CN8802 50P CONNECTOR AKM1349 CAPACITORS CN8803 40P CONNECTOR AKM1348 C8301 CKSSYB472K25 PDP-5071PU...
  • Page 40 JA9101 PIN JACK (3P) AKB1303 JA9102 PIN JACK (3P) AKB1305 9102, 9103 SCREW TERMINAL VNE1949 SP TERMINAL ASSY RESISTORS MISCELLANEOUS All Resistors RS1/16SS###J > F3901, 3902 ATF1224 JA3901 SPEAKER TERMINAL AKE1061 CAPACITORS C9105, 9106 CKSRYB105K10 RESISTORS C9114 CKSSYF104Z16 All Resistors RS1/16S###J PDP-5071PU...
  • Page 41 [50 ADR S LOGIC] All Resistors RS1/16S###J SEMICONDUCTORS IC1801 PEE003B MISCELLANEOUS 50 ADDRESS L ASSY L1801 QTL1013 [50 ADR L LOGIC] CN1801 CONNECTOR AKM1290 SEMICONDUCTORS CN1802 40P CONNECTOR AKM1348 IC1601 PEE003B RESISTORS MISCELLANEOUS R1801–1805 RS1/16SS1000F L1601 QTL1013 Other Resistors RS1/16SS###J PDP-5071PU...
  • Page 42 POWER SUPPLY UNIT has no service part. SEMICONDUCTORS IC2801–2806 SN755870KPZT-P D2801 CRH01 D2802–2807, 2809, 2811 1SS302 D2810 1SS355 MISCELLANEOUS CN2801 13P CONNECTOR NONPCB AKP1261 CN2802 CONNECTOR AKM1281 CN2803 PH CONNECTOR AKP1306 RESISTORS R2805, 2810, 2813, 2816 RAB4C221J R2819, 2822 RAB4C221J Other Resistors RS1/16S###J PDP-5071PU...
  • Page 43 PDP-5071PU...
  • Page 44: Block Diagram And Schematic Diagram

    4. BLOCK DIAGRAM AND SCHEMATIC DIAGRAM 4.1 OVERALL CONNECTION DIAGRAM (1/2) ADG1215- PDP-5071PU...
  • Page 45 ÷ When ordering service parts, be sure to refer to "EXPLODED VIEWS and PARTS LIST" or "PCB PARTS LIST". ÷ The > mark found on some component parts indicates the importance of the safety factor of the part. Therefore, when replacing, be sure to use parts of identical designation. PDP-5071PU...
  • Page 46: Overall Connection Diagram (2/2)

    4.2 OVERALL CONNECTION DIAGRAM (2/2) AWV2313- (REGULAR) (REGULAR) AWW1156 AWV2313- AWV2310- (ELITE) AWW1157 AWW1153 (ELITE) AWV2310- AWW1155 PDP-5071PU...
  • Page 47 (REGULAR) AWV2313- AWW1154 (ELITE) AWV2310- AWW1158 PDP-5071PU...
  • Page 48: Overall Block Diagram (1/2)

    CLK / LE / HBLK / LBLK R/G/B R/G/B DRIVER IC DRIVER IC DRIVER IC DRIVER IC DRIVER IC DRIVER IC DRIVER IC DRIVER IC DRIVER IC DRIVER IC DRIVER IC IC1855 IC1854 IC1853 IC1852 IC1851 IC1656 IC1655 IC1654 IC1653 IC1652 IC1651 PDP-5071PU...
  • Page 49 CLK / LE / HBLK / LBLK R/G/B R/G/B DRIVER IC DRIVER IC DRIVER IC DRIVER IC DRIVER IC DRIVER IC DRIVER IC DRIVER IC DRIVER IC DRIVER IC DRIVER IC IC1855 IC1854 IC1853 IC1852 IC1851 IC1656 IC1655 IC1654 IC1653 IC1652 IC1651 PDP-5071PU...
  • Page 50: Overall Block Diagram (2/2)

    4.4 OVERALL BLOCK DIAGRAM (2/2) PDP-5071PU...
  • Page 51: Address S And L Assys

    R/G/B VADR1 VDDLS1 VADR2 VDDLS2 VADR3 VDDLS3 VADR4 VDDLS4 VADR5 VDDLS5 VADR6 VDDLS6 RESONANCE RESONANCE RESONANCE RESONANCE RESONANCE RESONANCE BLOCK BLOCK BLOCK BLOCK BLOCK BLOCK IC1601 LVDS V+60V V+5V Reciever V+8V AN/P BN/P V+3V CN/P DN/P CLKN/P CN1602 CN1601 PDP-5071PU...
  • Page 52: Scan A And B Assys

    Signal Scan IC PSUS IC2801 VH IC5V Scan IC IC2802 VH IC5V Scan IC IC2803 VH IC5V Scan IC IC2804 VH IC5V Scan IC IC2805 VH IC5V Scan Signal Scan IC IC2806 IC5V 50 SCAN A ASSY (LOW SIDE) PDP-5071PU...
  • Page 53: Main Drive And 50X Sub Drive Assys

    +16.5V +16.5V +5V VSUS CONV. +16.5 Drive Signal MASK BLOCK RESONANCE Drive Signal BLOCK LOGIC DK MOD. PSUS BLOCK (IC1104) Drive Signal –RESET BLOCK PSUS +16.5V DC/DC CONV. +16.5V +5V VSUS +60V MASK BLOCK PSUS 50X MAIN DRIVE ASSY PDP-5071PU...
  • Page 54: Main Drive And 50Y Sub Drive Assys

    MASK BLOCK VSUS +6.5V REGULATOR +16.5V +5V +16.5V RESONANCE BLOCK VSUS +16.5V LOGIC BLOCK DK MOD. (IC2107) MASK PSUS BLOCK +16.5V SOFT-D BLOCK IC5V +16.5V IC5V/VF IC5V IC5V DC/DC CONV. Photo Coupler Scan Signal BLOCK 50Y MAIN DRIVE ASSY PDP-5071PU...
  • Page 55: Digital Assy

    SQ_PD Width YPR-U MASK PD_MUTE DRF_ MODULE UCOM XSUS M30620FCPGP IC3151 V+8V PSIZE V+8V UART V+8V SUB-FILD CONV. & XY DRV SEQUENCE PATTERN GEN. LVDS PEG239A-K LVDS V+8V IC3401 FlashMemory IC3301 H DET LED_R LED_B V+3V_D MSEL V+3VACTV YOBI PDP-5071PU...
  • Page 56: Audio Assy

    PSW_A REGULATOR IC3752 PQ120DNA1ZPH BUFFER +16.5V +12V POWER AMP IC WOW + VOLUME IC IC3751 IC3753 LA4625 NJW1183GK1 +12V BUFFER DC DETECT BLOCK A_Mute A_STBY_B R_Audio L_Audio MAIN Assy A_NG_B AUDIO ASSY R OUT L OUT SP TERMINAL ASSY PDP-5071PU...
  • Page 57 PDP-5071PU...
  • Page 58: Signal Block Diagram

    KEY1/2 CN4006(2/2) LED_REC/MDM LED IR REM_B Assy IC7101 SIDE KEY KEY_AD1/AD2 IC7201 IC7001 Assy PCM1803D PE5436 TVP5160 CN4010 (GA) (VDEC) (ADC) PC Input HNM Assy IC6201 IC6301 BCM3517 (Elite Only) BCM7038 POD Card ETHER OPT Out G-LINK POD Assy PDP-5071PU...
  • Page 59 LED_ON/OFF IC8401 MB91305PMC TXD_IF/RXD_IF (MAIN UCOM) IC5401 CN4007 SII9023CTU (HDMI) RST_DT AUDIO_L/R TXD_AU RXD_AU TXD_DT RXD_DT AUDIO Assy IC8407 PQ200WNA1ZPH A0 to19 (FAN CONTROL) DQ0 to15 CN4006 CN4009 IC8402 Input5 Input6 (1/2) AGC1006 HDMI HDMI (FLASH) 50 LED Assy PDP-5071PU...
  • Page 60: Dtv Block Diagram

    CIMaX OOB_Data Logic Circuit [IC7302] I2C1 EBI BUS FLASH 32MBytes [IC6902] SPDIF out HSX_0 I2C0 SDRAM [IC6602] 256Mbit SDRAM BCM7038KPB1G-B2-K [IC6603] [IC6301] 256Mbit SDRAM [IC6604] 256Mbit SDRAM [IC6605] 256Mbit [12bit] Digital Video UARTA Gata ARRY [IC7201] From/To Main uCom PDP-5071PU...
  • Page 61 Audio L/R in Audio A/D [IC7101] From AV_SW ITU-R656 CVBS in VDEC [IC7001] I2C2 SDRAM [IC7002] 16Mbit Video out for monitor (Y, C) Audio L/R for monitor To AV_SW Audio L/R for PANEL (16bit) Digital Video out To Digital Selecter PDP-5071PU...
  • Page 62: Y Drive Power Line Block Diagram

    * VOFS DC/DC converter and VPRST regulator are controled by electric volume. Scan IC 50 Scan A/B Assy VOFS DC/DC converter and VRN DC/DC converter are generated from 16.5 v, but they do not operate when Vsus is under 100V. PDP-5071PU...
  • Page 63: Fukugo Block Power Line Block Diagram

    4.14 FUKUGO BLOCK POWER LINE BLOCK DIAGRAM AUDIO Assy POWER AMP +16_5V IC3751 LA4625 16.5V → 12V WOW+VOL IC +12V IC3752 IC3753 PQ120DNA1ZPH NJW1183GK1 LED IR Assy V+5.1V_STB IC9702 SBX3050-01 KEY Assy KEY Block V+3.3V_STB S9501 to S9507 PDP-5071PU...
  • Page 64: Power Supply Unit

    4.15 POWER SUPPLY UNIT PDP-5071PU...
  • Page 65: Voltages

    V+5.1V V+5.1V V+5.1V V+5.1V 50X MAIN DRIVE ASSY 50 ADDRESS S ASSY 50 ADDRESS L ASSY X3 CN1202(KM200NA8) Voltage AD1 CN1801(AKM1290- -TBB)AD1 CN1601(AKM1290- -TBB) Name Name Name VADR VADR VADR VADR GND_ADR GND_ADR GND_ADR GND_ADR V+5.1V V+5.1V V+5.1V V+5.1V PDP-5071PU...
  • Page 66 INPUT4_PLUG INPUT1_SC INPUT1_SC INPUT1_S2 INPUT1_S2 INPUT4_Y INPUT4_Y INPUT1_SPLUG INPUT1_SPLUG INPUT1_SY INPUT1_SY INPUT4_PB INPUT4_PB INPUT2_V INPUT2_V INPUT4_PR INPUT4_PR INPUT2_SC INPUT2_SC INPUT4_V INPUT4_V INPUT2_S2 INPUT2_S2 INPUT2_SPLUG INPUT2_SPLUG INPUT4_L INPUT4_L INPUT2_SY INPUT2_SY INPUT4_R INPUT4_R TEMP_2 TEMP_2 V+9V_A V+9V_A V+9V_A V+9V_A V+3.3V_UCOM V+3.3V_UCOM PDP-5071PU...
  • Page 67 V+3.3V_UCOM V+3.3V_UCOM TEMP2_P TEMP2_P POD Assy MTB MAIN Assy CN9003(CKS3826-) CN4013(AKM1233- -TBB) Voltage Name Name PC_H PC_H PC_V PC_V PC_B 2.4* PC_B PC_G 2.4* PC_G PC_R 2.4* PC_R V+5V_A V+5V_A V+9V_A V+9V_A * When PC signal is not inputted. PDP-5071PU...
  • Page 68 LED_REC MTB MAIN Assy CN9701 LED_MDM LED_MDM CN4009(AKM1274- -TBB) Voltage CN9701 LED- LED- Name Name 7.7/11 FAN_VCC FAN_NG1 TRAP-SW MTB MAIN Assy CN4018(AKM1213- -TFB) Voltage Name Name TRAP_SW V+3_3V_UCOM MTB MAIN Assy CN7101(AKM1276- -TBB) Voltage Name Name VBUS SHILD PDP-5071PU...
  • Page 69 0 to 3.3 – – – – RESERVE (N.C.) – Reserve – – AC_OFF (N.C.) AC state input – – TXD_MD UART communication – RXD_MD UART communication – REQ_MD Communication demand to main system – MODE Model distinction – PDP-5071PU...
  • Page 70 0 to 3.3 – RELAY Relay control 0 to 3.3 – Large power supply ON/OFF control signal 0 to 3.3 – DRF_B AC power supply state input 0 to 3.3 – AC_DET Power down trigger signal 0 to 3.3 – PD_TRG_B PDP-5071PU...
  • Page 71 – – GND_LVDS – – – – V+3.3V +3.3 V power supply output – V+3.3V +3.3 V power supply output – – – – DIV1 Data output timing control – DIV0 Data output timing control – – – – PDP-5071PU...
  • Page 72 GND_LVDS – – – – – – V+3.3V +3.3 V power supply output – V+3.3V +3.3 V power supply output – – – – DIV1 Data output timing control – DIV0 Data output timing control – – – – PDP-5071PU...
  • Page 73 – – GND_LVDS – – – – V+3.3V +3.3 V power supply output – V+3.3V +3.3 V power supply output – – – – DIV1 Data output timing control – DIV0 Data output timing control – – – – PDP-5071PU...
  • Page 74 GND_LVDS – – – – – – V+3.3V +3.3 V power supply output – V+3.3V +3.3 V power supply output – – – – DIV1 Data output timing control – DIV0 Data output timing control – – – – PDP-5071PU...
  • Page 75 – – – – SI_H Scan control signal 0 to 3.3 – SI_L Scan control signal 0 to 3.3 – SCN5V_PD Scan 5 V PD signal 0 to 3.3 – YCN_PD Y drive PD signal 0 to 3.3 – PDP-5071PU...
  • Page 76 Woofer output R+ (Speaker output R+) – RH– Toweeter output R– – RL– Woofer output R– (Speaker output R–) – Woofer output L+ (Speaker output L+) – Toweeter output L+ – LL– Woofer output L– (Speaker output L–) – LH– Toweeter output L– – PDP-5071PU...
  • Page 77 Pin No. Pin Name Function Remarks V+5.1V_STB – Standby 5.1 V power supply – Remote control signal – LED– – LED signal return – LED_REC LED control for REC H : LED_ON, L : LED_OFF LED_MDM – – – – PDP-5071PU...
  • Page 78: Waveforms

    R1608 R ch signal R1608 R1637 R1637 R1621 R1621 ADR-D R1720 HBLK R1615 – – ADR-B R1714 – – LBLK R1616 Color-Bar (MKSS17) Color-Bar (MKSS17) 2ms/div 2ms/div 200ns/div 200ns/div B/W Checkered pattern (MKSS14) B/W Checkered pattern (MKSS14) 2ms/div 2ms/div PDP-5071PU...
  • Page 79 500ns/div 500ns/div 200ns/div PDP-5071PU...
  • Page 80 K2021 (YSUS_G) -K2014(GND) V:5 V/div H:500 nS/div (Y drive Assy) K2009 (YSUS_U) -K2014(GND) V:5 V/div H:500 nS/div (Y drive Assy) K2013 (YSUS_B) -K2014(GND) V:5 V/div H:500 nS/div (Y drive Assy) K2010 (YSUS_D) -K2014(GND) V:5 V/div H:500 nS/div (Y drive Assy) PDP-5071PU...
  • Page 81 IC2001 16 (SI_H) -K2014(GND) V:1V/div H:2mS/div (Y drive Assy) • IC2001 15 (CLR) -K2014(GND) V:1V/div H:2mS/div (Y drive Assy) ª IC2001 14 (OC2) -K2014(GND) V:1V/div H:2mS/div (Y drive Assy) º IC2001 13 (OC1) -K2014(GND) V:1V/div H:2mS/div (Y drive Assy) PDP-5071PU...
  • Page 82: Diagnosis Information

    Is there any local abnormality Is the abnormality associated Replace the panel chassis. with a single scan line? on the screen? with one address or one TCP? Failure analysis for the Failure analysis for the drive system ⇒ DR3 drive system ⇒ DR4 PDP-5071PU...
  • Page 83 Is an external video signal MAIN Assy ⇒ MA3 displayed properly? Problems concerning the audio output No Failure analysis for the Is the audio signal output? audio system ⇒ AU1 Specific failure whose cause is difficult to identify in the initial stage PDP-5071PU...
  • Page 84: Flowchart Of Failure Analysis For The Power Supply Unit

    Replace the POWER SUPPLY 200 and 210 V (VSU: 125/35°C). specified range? Unit. The ripple must be within 10 V. Replace the POWER SUPPLY Is there a fluctuation in the VSUS voltage? Unit. The POWER SUPPLY Unit is normal. PDP-5071PU...
  • Page 85: Flowchart Of Failure Analysis For The Digital Assy

    Replace the MAIN Assy. Replace the MAIN Assy. Is the indication position correct? It is most likely that the sync signal is abnormal. Is the tone correct? It is most likely that the video signal data are missing. Replace the MAIN Assy. PDP-5071PU...
  • Page 86: Flowchart Of Failure Analysis For The Drive Assy

    Properly connect the panel Are the panel FFC cables properly Replace the FFC cables. Is the input signal normal? FFC cables. connected to the X/Y DRIVE Assys? Replace the panel chassis. Replace the X/Y DRIVE Assys. Replace the DIGITAL Assy. PDP-5071PU...
  • Page 87 Is the input signal normal? Replace the FFC cables. (See the oscilloscope photos.) Replace the DIGITAL Assy. Is the waveform of the control Replace the Y DRIVE Assy. signal from the SCAN Assy normal? (See the oscilloscope photos.) Replace the SCAN IC. PDP-5071PU...
  • Page 88 Are all the connectors properly Reconnect the connectors. connected? Is the TCP control signal normal? Is the input signal normal? (See the oscilloscope photos.) (See the oscilloscope photos.) Replace the panel chassis. Replace the FFC cables. Replace the DIGITAL Assy. PDP-5071PU...
  • Page 89 Replace the SCAN IC. Replace the panel chassis. Failure analysis for the drive system ⇒ DR5 Check with the slanting ramp mask that moves. The panel mask is not displayed properly. Failure analysis for the drive system ⇒ DR2 PDP-5071PU...
  • Page 90: Flowchart Of Failure Analysis For The Main Assy

    If the voltage at Pin 129 (RST3 port) on the main microcomputer is high, it is judged that the AC power Replace the MAIN Assy. cord is not plugged in, and operation of the unit will stop there. PDP-5071PU...
  • Page 91: Flowchart Of Failure Analysis For The Video System

    Is the selected input signal an ⇒ COMP / S2 analog TV signal? Is the selected input signal a ⇒ DTV digital TV signal? Is the selected input signal a ⇒ USB USB signal? No problem with the MAIN Assy PDP-5071PU...
  • Page 92 IC5101 - pin 148 (s-video) IC5101 - pin 158 (s-video) V: 500 mV/div H: 20 µsec/div V: 500 mV/div H: 20 µsec/div V: 500 mV/div H: 20 µsec/div V: 500 mV/div H: 20 µsec/div V: 500 mV/div H: 20 µsec/div PDP-5071PU...
  • Page 93 IC5101 - pin 148 (s-video) IC5101 - pin 158 (s-video) V: 500 mV/div H: 20 µsec/div V: 500 mV/div H: 20 µsec/div V: 500 mV/div H: 20 µsec/div V: 500 mV/div H: 20 µsec/div V: 500 mV/div H: 20 µsec/div PDP-5071PU...
  • Page 94 IC5301 - pin 48 (PC) IC5301 - pin 54 (component) IC5301 - pin 54 (PC) V: 500 mV/div H: 10 µsec/div V: 500 mV/div H: 20 µsec/div V: 500 mV/div H: 20 µsec/div V: 500 mV/div H: 20 µsec/div PDP-5071PU...
  • Page 95 IC5301 - pin 54 (component) IC5301 - pin 54 (PC) V: 500 mV/div H: 20 µsec/div V: 500 mV/div H: 10 µsec/div V: 500 mV/div H: 20 µsec/div V: 500 mV/div H: 20 µsec/div V: 500 mV/div H: 20 µsec/div PDP-5071PU...
  • Page 96 CN4005. If there is no ploblem, check the Flexible cable between CN4005 and CN8803. Check the communication between Is a signal output from jack? the CN8803 and Jack. If there was no ploblem replace IO Assy. Finishing troubleshooting. PDP-5071PU...
  • Page 97: Flowchart Of Failure Analysis For The Audio System

    IC4704 - pin 1, 7 (DC-SUBWOO) V: 200 mV/div H: 4 msec/div V: 1 V/div H: 10 msec/div V: 200 mV/div H: 4 msec/div V: 500 mV/div H: 4 msec/div Input signal: 100 Hz Sound volume is fixed to 25. PDP-5071PU...
  • Page 98 Is a signal come to IC6301? IC6301and IC7101. If there is no problem, replace IC7101. Is a signal output from IC6301 and Check the communication between come to CN4007? (pin 3, 5) CN4007 and IC6301. If there is no problem, replace IC6301. PDP-5071PU...
  • Page 99 Home Menu? Media Gallery. Replace or reconnect flexible Check the Flexible cable between HNM Assy and CN4017. cable. Check the communication between Is a signal input to IC4701? CN4005 and IC4701and replace broken parts. Finishing troubleshooting. PDP-5071PU...
  • Page 100 Is the signal input from IC7201 to Check between IC7201 and IC8001? IC8001. Exchange IC6301 if there is no problem. Has the symptom been settled The panel is defective. when the MAIN Assy is replaced? Finishing troubleshooting. PDP-5071PU...
  • Page 101: Power Down

    5.2 POWER DOWN 5.2.1 BLOCK DIAGRAM OF THE POWER-DOWN SIGNAL Block Diagram of the Power-Down Signal PDP-5071PU...
  • Page 102: Power Down Of Failure Analysis

    50 SCAN A, B Assy 4 (SCN-5V) – 50 SCAN A, B Assy CN2801 – 50Y DRIVE Assy 4 (SCN-5V) CN1602, 50 DIGITAL Assy 8 (ADRS) – 50 ADDRESS CN1802 Assy CN1601, 50X DRIVE Assy, – 8 (ADRS) CN1801 50Y DRIVE Assy PDP-5071PU...
  • Page 103 Increase or decrease IC5V voltage detection SCN5V_PD SCAN bridge (upper) Voltage connector disconnection detection detection SCAN bridge (lower) connector disconnection detection Increase or decrease VOFS voltage detection Y_DD_PD Overvoltage VPrst detection Increase or decrease SCAN_PD voltage detection PDP-5071PU...
  • Page 104: Shut Down

    5.3 SHUT DOWN 5.3.1 BLOCK DIAGRAM OF THE SHUT-DOWN SIGNAL Block Diagram of the Shutdown Signal PDP-5071PU...
  • Page 105: Shut Down Of Failure Analysis

    5.3.2 SHUT DOWN OF FAILURE ANALYSIS PDP-5071PU...
  • Page 106: Non-Failure Symptoms

    8 bits each. In a case of color difference 4:2:2, Y, Cb, and Cr use 12 bits each, but Cb and Cr are transmitted at a half sampling rate of Y. This unit is capable of processing the upper 10 bits out of 12 bits of video data. Recent high-end DVD players, such as Pioneer DV-79AVi, are capable of outputting 10-bit color- difference signals.
  • Page 107: Disassembly

    AUDIO Assy MAIN Assy POD Assy SP TERMINAL Assy TANSHI Assy 50 ADDRESS 50 ADDRESS 50 ADDRESS 50 ADDRESS L Assy S Assy L Assy S Assy LED IR Assy 50 LED Assy Front view Front view Rear view PDP-5071PU...
  • Page 108: Flowchart Of The Main Parts And Pc Boards Exchange

    Tuner stay U panel shield shield (50U) 50 X MAIN 50 Y MAIN SIDE MAIN DRIVE DRIVE Terminal panel A Front case Assy (507PU) Speaker Terminal TANSHI 50 LED LED IR Panel holder, Front chassis VL SCAN A SCAN B PDP-5071PU...
  • Page 109 Side input cover Remove the side input cover. Rear case (507) Rear case (507) Remove the 17 screws. (AMZ30P060FTB) Remove the 12 screws. (TBZ40P080FTB) Remove the two screws. (ABA1332) Remove the one screw. (ABA1341) Remove the rear case (507). PDP-5071PU...
  • Page 110 Disconnect cables, connectors, as required. POD stay A MAIN Assy POD Assy Remove the two screws. Remove the two screws. Remove the two hex. head screws. Remove the POD cover. Remove the POD stay A with PCB. ×2 POD cover PDP-5071PU...
  • Page 111 Remove the terminal panel B (50U). ×16 Front Case Assy Remove the four rivets. Remove the Front Case Assy (507PU). Front case ×4 Rivet Turn it not to press the rivet. (Because when the rivet presses, fit in once again.) PDP-5071PU...
  • Page 112 Remove the three screws. Remove the front chassis VL (50). Front chassis VL (50) Exchange 50 Y SUB 50 Y MAIN DRIVE Assy DRIVE Assy ×6 ×6 SCAN IC SCAN IC 50 SCAN B Assy 50 SCAN A Assy PDP-5071PU...
  • Page 113: Adjustment

    Select “Channel Setup”. ( then ENTER) Select “POD ID”. ( • The Host ID and Cable Card ID appear. 5. Press HOME MENU to exit the menu. (*) : When replacing the MAIN Assy, be sure to do the FINAL SETUP. PDP-5071PU...
  • Page 114: Adjustment Required When Part Is Replaced

    No adjustment required 50 ADDRESS Assy No adjustment is required after replacement of parts SENSOR Assy other than those mentioned above. No adjustment required TANSHI Assy (*) : When replacing the MAIN Assy, be sure to do the FINAL SETUP. PDP-5071PU...
  • Page 115: Backup When The Panel Unit Is Adjusted

    2 Turn on the unit, using the remote control unit or by issuing the PON command. Then issue the FAY command. 3 Issue the BCP command to transfer the data stored in the EEPROM for backup. 4 Turn the power off. PDP-5071PU...
  • Page 116 2 Turn on the unit, using the remote control unit or by issuing the PON command. Then issue the FAY command. 3 Issue the UAJ command to delete data stored in the EEPROM on the DIGITAL Assy. 4 Issue the BCP command to transfer the data stored in the EEPROM for backup. 5 Turn the power off. PDP-5071PU...
  • Page 117 When a DIGITAL Assy with an EEPROM in which adjustment data are stored is mounted, this step is not required after manual adjustment. ("DIGITAL EEPROM: REPAIR" is not indicated.) (2) Method using the RS-232C commands Issue the FAJ command. PDP-5071PU...
  • Page 118: Exchange Of Service Panel Assy

    WBI S01 : Used to temporarily set the adjustment value of the Panel WB to default. (To return the value to its original value, use WBI S00.) PGM S00 : Used to set the gamma setting to Factory. Note: If the power is shut off in the process of the adjustment procedures, send the above commands again. PDP-5071PU...
  • Page 119 Note: The voltages in the flowcharts are given in absolute values (without ±). Command transfer After the voltage adjustment is finished, make the following settings: Mask: OFF, Factory: OUT CA check Check that the picture is properly displayed. Use DVD, LD, and broadcast signals for checking. PDP-5071PU...
  • Page 120 30 minutes to raise the panel temperature to a certain extent. This ensures the accuracy of inspection and adjustment. (To 2 ) PDP-5071PU...
  • Page 121 Vofs_max2. Replace the panel Is Vofs_max2 118 (36 [V]) again or abnormality or greater? in circuits Note: Return the Vofs value to the tentative This is for checking the lower limit of Vofs accurately. voltage setting. (To 3 ) PDP-5071PU...
  • Page 122 Set the lowest voltage among Vofs_max1, Vofs_ max2, Vofs_max3, and Vofs_max4 as Vofs_max. Is Vofs_max 187 (49 [V]) Value for Vofs = 139 (40 [V]) or greater? Value for Vofs = Vofs_max - 48 (9 [V]) Set the value as Vofs. (To 4 ) PDP-5071PU...
  • Page 123 082: Vyprst = 280 [V] Exit Factory mode: CA check Turn the unit off then back on again: POF, PON Use input signals from a DVD or PC for CA checking. Check that no bright cells or dark cells. PDP-5071PU...
  • Page 124 Conversion charts for electronic VRs (Vprst/Vofs) Vprst Setting value Vofs Setting value [STEP] [STEP] PDP-5071PU...
  • Page 125: Adjustments When The Drive Assys Are Replaced

    Adjust so that "∆ Tsus-gub = ∆ Tsus-iub + α ± 5 nsec," using the variable controls shown in the table below: Value of α Assy 50X MAIN DRIVE ASSY VR1001 70 nsec 50Y MAIN DRIVE ASSY VR2001 50 nsec PDP-5071PU...
  • Page 126 50 % of the crest value SUS-D signal (input to the DK module) SUS-D pulse width: Tsus-Dg Adjust so that "Tsus-Dg = Tsus-D ± 5 nsec," using the variable control shown in the table below: Assy Y MAIN DRIVE VR2002 PDP-5071PU...
  • Page 127 2 Adjust the pulse width of the SUS-D input signal for 1 Measure the SUS-D pulse width (Tsus-D). the DK module so that it becomes "Tsus-D ± 5 nsec." from TP2107 VR2002 IC2104 DIGITAL Assy IC2002_A7 Q2106 IC2107 YSUS-D Y DK Module PDP-5071PU...
  • Page 128: How To Clear History Data

    P COUNT INFO. < = > : NO OPRT P COUNT INFO. < = > : CLEAR Right SET (5 sec) MAX TEMP. < = > : NO OPRT Right MAX TEMP. < = > : CLEAR SET (5 sec) 3 Turn the power off. PDP-5071PU...
  • Page 129: Procedure When Replacing The Power Supply Unit

    Location of the jumper connector 1. As for service parts, the Jumper connector is 2. Remove the jumper connector from connector P10 and connect it to connector P11. connected at connector P10. 3. Connect the cable connector from power SW to P10. PDP-5071PU...
  • Page 130: Service Factory Mode

    How to come off Service Factory Mode. Case operated by remote control) • Service remote control : press [ FACTORY1 ] key. • Remote control : press [ HOME MENU ] key. Case to RS-232C transmit command) • Send [FAN] . PDP-5071PU...
  • Page 131: Operation Of Service Factory Mode

    (screenize switching, etc). • Data on screen (i.e.,screen position; meaning clock dividers, and not including data on screen size) Are reset to the default values (data stored in memory will be retained). Screen size will be retained. PDP-5071PU...
  • Page 132: Remote Control Code

    : When ten seconds have passed since the [ DRIVE ON/OFF ] key was pressed at the standby, it becomes invalid. Please press [ POWER ] key from the [ DRIVE ON/OFF ] key pressing within ten seconds when you do power supply ON while driven OFF. Remote Control Unit for Servicing PDP-5071PU...
  • Page 133: Configuration Of Factory Mode

    INTR-POS1(0x75) ⇔ 8.2.4.8 HDMI INTR POSITION (+) 000 to 255 for technical analysis INTR-POS2(0x76) ⇔ 000 to 255 for technical analysis INTR-POS3(0x77) ⇔ for technical analysis 000 to 255 INTR-POS4(0x78) ⇔ 000 to 255 for technical analysis PDP-5071PU...
  • Page 134: Indication (Osd) Of Service Factory Mode

    Note: See SIG-Mode Tables.(See next page.) Color system and Signal type Color system and signal type NTSC Composite input S-connector input Y/CB/CR Y/PB/PR Digital video signal Option(Destination, Panel Generation, etc) Options SX System in North America(Regular) ATB7 SX system in North America(ELITE) AHB7 PDP-5071PU...
  • Page 135 46.875 1024x768 60.004 48.363 70.069 56.476 75.029 60.023 1360x768 60.015 47.712 Selection of the screen size by the user is displayed. GUI Notation VIDEO Remark Character DOT BY DOT FULL (FULL1) ZOOM CINEMA WIDE FULL2 : supported, : unsupported PDP-5071PU...
  • Page 136: Factory Menu

    In the 29-32 rows, ROM version information on each device is displayed. In the 19-24 rows, Version information on a common treatment is displayed. At the position "14x35", The Past/Highly effective panel distinction information is displayed. " P " : The past panel, "F" : The highly effective panel PDP-5071PU...
  • Page 137 CFE Version HHHHHHHH KERNEL Version KERNEL HHHHHHHH ROOTFS Version ROOTFS HHHHHHHH FLAGS FLAGS (Y) FONTS(Y) DFTS (Y) PLOG (Y) 8.2.1.3 VERSION(3) Flash Device Item Name Elite Regular CCD-UCOM Version MSKB HMG/HG module Version HMG/HG 0123456789 User Password PASSWORD 1234 PDP-5071PU...
  • Page 138 - TV-Guide Error HOME-G - Failure at Home Gallary MA-PWR M-DCDC -Abnormally in RST2 of MAIN Assy (power decrease of DC-DC converter) RELAY -Abnormally in RST4 of MAIN Assy (power decrease of Relay power) Failure at Home Media Gallary START PDP-5071PU...
  • Page 139 Even if [ ← ] key or [ → ] key is pushed, "CLEAR ⇔ YES" ⇔ "CLEAR ⇔ NO" is repeated. If the [ ENTER ] key is kept on pressing for 5 second when the status of this menu is <YES>, clear process will begin. PDP-5071PU...
  • Page 140 In HOUR METER screen on Factory Menu, press the [ENTER] key, and then it moves to the screen to clear MTB HOUR METER. Display / Meaning: Meaning Item Name RS-232C command HOUR METER (PANEL) PANEL 00151H 21M HOUR METER (MTB) 00151H 21M – POWER ON COUNTER P-COUNT 00000095 TIMES SYSTEM SERIAL SERIAL PDP-5071PU...
  • Page 141 Video information: valid horizontal pixel numbers (low order bit) - 3B: Video information: valid horizontal pixel numbers (high order bit) - 3C: Video information: valid vertical line numbers (low order bit) - 3D: Video information: valid vertical line numbers (high order bit) PDP-5071PU...
  • Page 142 H RES V RES H DE V DE V FMT 480i (525i) 262 or 263 720x480i @ 60 480p (525p) 720x480p @ 60 1080i (1125i) 2200 562 or 563 1920 1920x1080i @ 60 720p (750p) 1650 1280 1280x720p @ 60 PDP-5071PU...
  • Page 143 Displays input signal status of MVDEC terminal. Device Context MVDEC Signal distinct result 1 Signal distinct result 2 Flag detection output Noise level distinction 1 Noise level distinction 2 Non-standard signal detection Sub carrier signal detection ACC data output ACC information output Input signal mode PDP-5071PU...
  • Page 144 Displays digital broadcast signal information and status upon receiving digital signal. 8.2.1.13 DTV TV-GUIDE BER Exclusively used for production line. TV-Guide error bit ratio information is displayed. 8.2.1.14 DEBUG INFO Exclusively used for technical analsyis. Debug information for development use is displayed. PDP-5071PU...
  • Page 145: Panel Factory Mode

    8.2.2.9 RASTER MASK SETUP (+) The mask indication (RASTER) can be set and indicated. 8.2.2.10 PATTEN MASK SETUP (+) The mask indication (PATTERN) can be set and indicated. 8.2.2.11 COMBI MASK SETUP (+) The mask indication (COMBI) can be set and indicated. PDP-5071PU...
  • Page 146 • P-COUNT: The accumulated power-on count is indicated. • TEMP1: The current panel temperature and the historical maximum temperature recorded in memory are indicated. The range of temperature indication is from -50.0 to +99.9. (The temperature unit is " °C (Centigrade) ".) PDP-5071PU...
  • Page 147 7 Key operation <DOWN> : Shifting to PANEL-1 ADJ (+) <UP> : Shifting to POWER DOWN <L/R> : Updating displayed information * When there is detail information when shutdown occurred, the possible defective part is displayed as Sub information. PDP-5071PU...
  • Page 148 : Subtracting by one from the adjustment/setting value <VOL+> : Adding by 10 to the adjustment/ setting value <VOL-> : Subtracting by 10 from the adjustment/setting value <SET> : Determining the adjustment/setting value and shifting to the upper layer PDP-5071PU...
  • Page 149 : Subtracting by one from the adjustment/setting value <VOL+> : Adding by 10 to the adjustment/ setting value <VOL-> : Subtracting by 10 from the adjustment/setting value <SET> : Determining the adjustment/setting value and shifting to the upper layer PDP-5071PU...
  • Page 150 <DOWN> : Shifting to the next item <UP> : Shifting to the previous item <RIGHT> : Adding by one to the adjustment/ setting value <LEFT> : Subtracting by one from the adjustment/setting value <SET> : Determining the adjustment/setting value and shifting to the upper layer PDP-5071PU...
  • Page 151 <DOWN> : Shifting to the next item <UP> : Shifting to the previous item <RIGHT> : Adding by one to the adjustment/ setting value <LEFT> : Subtracting by one from the adjustment/setting value <SET> : Determining the adjustment/setting value and shifting to the upper layer PDP-5071PU...
  • Page 152 Left key. The selected sequence and the ABL/WB table are retained until the mask is turned off. • 48 V and 60 P are deleted from the sequence, and represented by 50 V and 60 V, respectively. The ABL/WB table is changed to the PC table. PDP-5071PU...
  • Page 153 Left key. The selected sequence and the ABL/WB table are retained until the mask is turned off. • 48 V and 60 P are deleted from the sequence, and represented by 50 V and 60 V, respectively. The ABL/WB table is changed to the PC table. PDP-5071PU...
  • Page 154 Left key. The selected sequence and the ABL/WB table are retained until the mask is turned off. • 48 V and 60 P are deleted from the sequence, and represented by 50 V and 60 V, respectively. The ABL/WB table is changed to the PC table. PDP-5071PU...
  • Page 155: Option Mode

    If the signal is changed to cable, then the cable’s broadcast map is configured, and air’s broadcast map is destroyed. OSD display Funcrion Control device CABLE Change the antenna setting to cable Change the antenna setting to air 8.2.3.3 AFT Exclusively used for production line. PDP-5071PU...
  • Page 156: Initialize Mode

    DIG MVDEC YCBCR MAIN VDEC: YCbCr (Digital output mode) ANA MVDEC YCBCR MAIN VDEC: YCbCr (Analog output mode) ANA MVDEC Y MAIN VDEC: Y (Analog output mode: SG VDEC return setting) ANA AD YCBCR AD: YCbCr ANA AD RGB AD: RGB PDP-5071PU...
  • Page 157 For this account the latter part from MVDEC does not have set values, resulting in having funny colors in colorbar, the brightness changes after switching, etc. This is not a damage result nor error. • Depending on MVDEC’s part version, ANA_MVDEC_YCBCR may not display colors. PDP-5071PU...
  • Page 158 When the configuration is set to <YES> and the [SET] key is pressed for 5 seconds, the reset action executes. Be sure to disconnect and connect the Power cord after the FINAL SETUP. When replacing the MAIN ASSY, the FINAL SETUP is required. PDP-5071PU...
  • Page 159 For ELITE model Be sure to do above procedure at input fuction except HMG. 2nd FACTORY MODE [ Home Gallery ] (Regular Model) 1. Home Gallery Screen (1) When the device is connected (2) When the device is not connected PDP-5071PU...
  • Page 160 0 E (Endpoint descriptor info) - E (Endpoint descriptor info) Endpoint Address (I=In, O=Out) Hexadecimal(String) Attributes Hexadecimal(String) MxPS Endpoint Max Packet Size Decimal Interval (max) between transfers Decimal 2. End method It is the same as the case that Home Gallery displays. PDP-5071PU...
  • Page 161: List Of Rs-232C Commands

    (Please follow a operating instructions of the PC about the Com port.) 9.1.2 USING RS-232C COMMANDS For the PDP-4271HD/KUCXC, PDP-5071PU/KUCXC, PRO-940HD/KUCXC and PRO-1140HD/KU CXC series Plasma Displays, the circuitry is structured as shown in the diagram below to support the SR+ system.
  • Page 162: Command Protocol

    ETX, the character string sandwiched between STX and ETX is recognized as a command. If the prepared character string storage buffer (24 bytes including STX, ID and ETX) is exceeded, a reply will not be sent out. PDP-5071PU...
  • Page 163: Definition Of Command

    The data length will be subject to each individual specification as the content of a reply will be different depending on the type of QUEST command. Data transmitted from PC Reply data Command Command Parameter ∗∗ 0x02 0x03 0x02 • • • • • • • • • 0x03 PDP-5071PU...
  • Page 164: List Of Rs-232C Commands

    Factory mode on ¶ Set each memory setting of MTB side to the shipment state. MDU MTB ∗∗∗ ¶ User white balance : GREEN highlight ∗∗∗ ¶ User white balance : GREEN lowlight ¶ ¶ Green side mask level adjustment PDP-5071PU...
  • Page 165 Window (Hi= 1023) 4 % ¶ ¶ Window (Hi= 1023) 1.25 % ¶ ¶ Window (1/7 LINE) ¶ ¶ STRIPE (MGT/GRN) ¶ ¶ STRIPE (GRN/MGT) ¶ ¶ B & W, checker (1 line) ¶ ¶ B & W, checker (2 lines) PDP-5071PU...
  • Page 166 ¶ RASTER17: Pale purple ¶ ¶ RASTER18: Magenta 54 ¶ ¶ RASTER19: Red 1023+ ¶ ¶ RASTER20: Green 1023+ ¶ ¶ RASTER21: Blue 1023+ ¶ ¶ RASTER22: Red 588+ ¶ ¶ RASTER23: Green 588+ ¶ ¶ RASTER24: Pale rose PDP-5071PU...
  • Page 167 ¶ Acquiring data on the status of the unit, such as temperature Acquiring unit data, such as the software version common ¶ to all models, regardless of destination ¶ Acquiring data on shutdown PDP-5071PU...
  • Page 168 Setting the screen size to FULL1035 – – MDU MTB ¶ Determining the flag for the DIGITAL Assy adjustment in "not adjusted" To add ∗∗∗ to the adjustment value (∗∗∗ = 000 to 999, ¶ UP∗ designated by a function command) PDP-5071PU...
  • Page 169 Y-SUSTAIL T2 ADJ ¶ ∗∗∗ ¶ Y-SUSTAIL T1 ADJ ¶ ¶ ∗∗∗ Y-SUSTAIL W ADJ ¶ ¶ Initializing the DTB FLASH ¶ ¶ Initializing the video EEPROM data ¶ ¶ Initializing the setting data to which no adjustment command is provided PDP-5071PU...
  • Page 170: Outline Of Commands

    TXC / Re gula r (US) J Japan (reserved) S System model B Not used.( For Future) B All-in-one design TV Regular D Panal Type Regular A M Monitor P the past D Standard module F High-effective E Simple module PDP-5071PU...
  • Page 171: Qs2

    Adjustment not completed 11: Operation status 13: MASK indication X-DRV induced by SD X-DCDC MASK-OFF Normal X-SUS MASK-ON 3: Adjustment-data Relay-off completed backup Not used During warning Not used With backup data indication Not used No data (default) UNKNOWN PDP-5071PU...
  • Page 172: Qip

    RYW adjustment value 3 Byte R-REVICE setting value 1 Byte G-REVICE setting value 1 Byte B-REVICE setting value 1 Byte 2 Byte • For each REVICE setting value, the level set for RRL, RGL, or RBL is transmitted as one character. PDP-5071PU...
  • Page 173: Qpw

    To acquire data on operations of the panel Return data: 3 (ECO)+40(DATA)+2(CS)= 45 Byte Data Data Arrangement Output Example Length 3Byte Pulse meter B 1 8Byte 00000000 Pulse meter B 2 8Byte 00000000 Pulse meter B 3 8Byte 00000000 Pulse meter B 4 8Byte 00000000 Pulse meter B 5 8Byte 00000000 2Byte PDP-5071PU...
  • Page 174: Qpd

    Data from the hour meter for the seventh latest PD 8 Byte 00000213 Eighth latest "1st PD" data 1 Byte Eighth latest "2nd PD" data 1 Byte Data from the hour meter for the eighth latest PD 8 Byte 000001A7 2 Byte PDP-5071PU...
  • Page 175: Qsd

    Data from the hour meter for the seventh latest SD 8byte 00000000 BACKUP Eighth latest SD data 1byte Eighth latest SD subcategory data 1byte Data from the hour meter for the eighth latest SD 8byte 00000000 ¶ SD subcategory (TEMP) 2Byte No SD-Sub data TEMP1 Reserved PDP-5071PU...
  • Page 176: Qs6

    1 byte FLAGS Information 3 1 byte FLAGS Information 4 1 byte FLAGS Information 5 1 byte FLAGS Information 6 1 byte Version of CCD-UCOM 4 byte HMG/HG MODELE Version 10byte User Password 4 byte Check Sum 2 byte PDP-5071PU...
  • Page 177: Qsi

    1 Byte Result of detection of cracking in the panel 1 Byte Result of detection for scanning protection 1 Byte Result of detection for external protection 1 Byte Transition of protection operation 1 Byte ∗∗∗∗ Reserved 4 Byte 2 Byte PDP-5071PU...
  • Page 178: Qmt

    <No.1 Subcategory Information on "failure in 3-wire serial communication of Main microcomputer"> Data Cause of shutdown Remarks Non subcategory IF microcomputer communication failure IF (immediately Power Supply OFF) MANTA communication failure (MULTI1) MULTI1 (immediately Power Supply OFF) MANTA communication failure (I/P) MANTA communication failure (D-SEL) D-SEL PDP-5071PU...
  • Page 179: Drv

    9.3.13 DRV 7 DRV Drive ON/OFF : ON/OFF control for only the large-power system Remarks Effective Condition Function Format [DRV+S00] Every time DRIVE OFF At standby mode, when 10 seconds passed after issuing [DRV+S00], command becomes invalid. [DRV+S01] DRIVE ON PDP-5071PU...
  • Page 180: Commands For Prohibition/Permission Of Dtv/Homenet Communication

    • While ZACS01 is established, the LED for ZAC flashes. The priority of LED indications is as follows: PD > Trap-SW > DTV_STB > SD > ZAC >DTN > no backup copy > Standalone operation of the Assy > Normal ON/OFF • Even if DTNS00 is established, if ZACS01 is established, DTV/HomeNet communication must be prohibited. PDP-5071PU...
  • Page 181: Other Commands

    To make the flag setting that [CBU] Writing F0 to the 2 k byte ROM The backup ROM is indicating that backup data initialized. have not been copied To copy Digital backup data [BCP] Copying backup data to EEPROM PDP-5071PU...
  • Page 182: General Information

    4 : The MOD microcomputer controls the relay of the power MOD of the PDP to startup the power of the PDP. 5 : The main microcomputer controls the ASIC power within the MTB to startup the power of the MTB. PDP-5071PU...
  • Page 183: Power Supply Transition Status

    10.2 POWER SUPPLY TRANSITION STATUS PDP-5071PU...
  • Page 184 A_STBY RST2 From A V+35V PSW1 V+16.5V PSW1 V+12V V+6.5V DCDC DCDC DCDC V+5.1V Vsus Vadr Audio MVDEC F.E. A/B Volume SVDEC RGB-SW SQ ASIC block HDMI AV-SW DSEL Drive Address Address Drive Drive MULTI 50 X&Y-Drive/Scan/Address Power supply PDP-5071PU...
  • Page 185 A_STBY RST2 From A V+35V PSW1 V+16.5V PSW1 V+12V V+6.5V DCDC DCDC DCDC V+5.1V Vsus Vadr Audio MVDEC F.E. A/B Volume SVDEC RGB-SW SQ ASIC block HDMI AV-SW DSEL Drive Address Address Drive Drive MULTI 50 X&Y-Drive/Scan/Address Power supply PDP-5071PU...
  • Page 186: Power On/Off Function For The Large-Signal System

    • Command [DRVS00/S01] is effective even during standby. When the main power is turned OFF, however, [DRVS01] (release) will be effective. Short the two adjacent electrodes on the surface by a method which assures continuity, such as using a crocodile clip. 50 DIGITAL ASSY PDP-5071PU...
  • Page 187: Led Information

    10.4 LED INFORMATION LED Pattern PDP-5071PU...
  • Page 188: Specification About The Thermal Protection

    Fan Operation According to the reading value of above table sensor. HIGH or LO FAN_CONT: "L" [ Outline Circuit ] FAN_vcc Vref = 2.64V H : Vo = 11V L : Vo = 7.6V U-COM FAN_CONT H: On L: Off PDP-5071PU...
  • Page 189: Processing In Abnormality

    Specifications for port monitoring Port Name SD/PD Indication Assigned Pin Active FAN_NG 1 Shutdown with H Abnormally high Shutdown when the TEMP2 temperature in the value exceeds the predetermined value TRAP_SW Circuit diagram TRAP_SW MTB MAIN Assy V_3.3V_UCOM TRAP_SW MAIN_UCOM PULL_D PDP-5071PU...
  • Page 190: Trap Sw

    TRAP SW on ahead, carry out following procedure from this state. Cancelling by the remote control • Enter to the Factory mode. • Then, proceed to INITIALIZE layer inside the Factory mode, and then press "DISPLAY" key for more than 5 seconds. PDP-5071PU...
  • Page 191: Specifications

    HDCP (High-bandwidth Digital Content Protection) is a technology used to protect copyrighted digital contents that use the Digital Visual Interface (DVI). ** This conforms to USB 1.1 and 2.0 . • Design and specifications are subject to change without notice. PDP-5071PU...
  • Page 192: Accessories

    AA size battery x 2 (Manganese battery for simplified (Alkaline battery for remote control unit) remote control unit) (for PDP-5071HD only) Filter (CTX1054) Buttons used for only basic operations are provided on the simplified remote control unit. You can use it as necessary. PDP-5071PU...
  • Page 193: Panel Facilities

    10 TV GUIDE button* 11 USB port 12 INPUT 4 terminals (COMPONENT VIDEO: Y, CB/PB, CR/PR) 13 INPUT 4 terminal (VIDEO) 14 INPUT 4 terminals (AUDIO) The buttons with asterisks (*) can operate the TV Guide On Screen™ system. PDP-5071PU...
  • Page 194 11 INPUT 6 terminals (AUDIO) 26 SPEAKER (R/L) terminals 12 SUB WOOFER terminal 27 SPEAKER (R) terminal (Speaker side) 13 INPUT 3 terminals (AUDIO) 28 SPEAKER (L) terminal (Speaker side) 14 INPUT 3 terminals (COMPONENT VIDEO: Y, CB/PB, CR/PR) PDP-5071PU...
  • Page 195 This enables quick access to the desired function when performing operations in dark places. NOTE • When using the remote control unit, point it at the Plasma Display. • for operating buttons not listed on this page. PDP-5071PU...
  • Page 196: Ic Information

    OUT47 OUT19 OUT46 OUT20 OUT45 OUT21 OUT44 OUT22 OUT43 OUT23 OUT42 OUT24 OUT41 OUT25 OUT40 OUT26 OUT39 OUT27 OUT38 BLOCK DIAGRAM Level Shift OUT1 Circuit Data Level 1-30, Shift 46-76, OUT2 - OUT63 Circuit Level Shift OUT64 Circuit Data PDP-5071PU...
  • Page 197 All output reset CLR terminal : L → normal operation, CLR terminal : H→ All output "H" − 93 - 94 GND1 − N.C. Not used − 96 - 97 Power for High-voltage circuit − N.C. Not used 99 - 100 OUT1 - OUT2 High-voltage push-pull output PDP-5071PU...
  • Page 198 USB 2.0 Digital Dual Audio 2x I S Ports Channel USB 1.1 1x SPDIF Audio Processor Analog Ethernet Audio 2x Dual Audio DDR-DRAM Controller DACs EJTAG Peripherals (200 MHz) Dual SATA S-ATA 64-bit wide DDR DRAM Test IR/LED/Key/UART SPI/BSC/GPIO/PWM SmartCard PDP-5071PU...
  • Page 199 R5520H001B (MAIN ASSY : IC7105) • USB HIGH-SIDE SW IC BLOCK DIAGRAM GATE CURRENT CONTROL LIMIT FLAG DELAY UVLO THERMAL SHUTDOWN PIN LAYOUT PIN FUNCTION Function Pin No. Name Enable terminal GND terminal FLAG terminal (Open-drain output) Power input terminal Output terminal PDP-5071PU...
  • Page 200 R2S11002AFT (MAIN ASSY: IC4701) • AV SW Block Diagram PDP-5071PU...
  • Page 201 R2S11001FT (MAIN ASSY: IC4901 • Component SW IC Block Diagram PDP-5071PU...
  • Page 202 UPD64015AGM-UEM (MAIN ASSY : IC5101) • Video decoder (for main screen) Block Diagram PDP-5071PU...
  • Page 203 AVDDA AVDD3 AGNDA AVDD3 IOCB VRT2 AVDDA ASCI AGNDA VRB2 IOYG AVDDA VCOM2 RSET ACBI VRT3 AGNDA DVDD1 VRB3 DGND VCOM3 AVDD3 DVDD3 AVDD3 VCOM4 SDRDQ15 SDRDQ0 ACRI VLPF2 SDRDQ14 SDRDQ1 VRB4 DVDD1 VRT4 SDRDQ13 AGND SDRDQ2 AGND DGND PDP-5071PU...
  • Page 204 Digital 3.3V power supply Connect to the 3.3V power supply. 109,120,132 DGND 17,24,33,38,45,56, – – Digital ground – 80,89,93,104,114, 2.2 System reset terminal Acronyms Terminal number Level Buffer type Functions PU/PD [kΩ] RSTB Schmitt – System reset input (Active-Low) PDP-5071PU...
  • Page 205 Connect to GND normally. VLPF1 Analog – Analog test output Connect to GND via a 0.1µF capacitor. VLPF2 Analog – Analog test output Connect to GND via a 0.1µF capacitor. Caution: Connect these terminals for test to GND unless otherwise instructed. PDP-5071PU...
  • Page 206 Digital RGB/B signal input DCRI LVTTL – Digital RGB/R signal input FCSI LVTTL 3 mA Sync separation signal input/timing output (HD) for RGB input. 3-state It will become Hi-Z when FCSIS[2:0] (SA22h, D2-D0)=000b. Normally, set to FCSIS[2:0]=0 and leave it open. PDP-5071PU...
  • Page 207 ADC2 top reference voltage Connect to GND via a 0.1µF capacitor. VRB2 Analog – ADC2 bottom reference voltage Connect to GND via a 0.1µF capacitor. VCOM2 Analog – ADC2 in-phase reference voltage Connect to GND via a 0.1µF capacitor. PDP-5071PU...
  • Page 208 Color difference component Cb/RGB component B output signal. Connect to AGNDA via a 200Ω load resistance. Analog – External reference input pin. Supply 1.0V. And, connect to AGNDA via a 0.1µF capacitor. RSET Analog – Connect to AGNDA via a 620Ω resistor for external adjustment. PDP-5071PU...
  • Page 209 3 mA Horizontal sync signal output 3-state LVTTL 3 mA Vertical sync signal output 3-state VBLK LVTTL 3 mA V blanking output 3-state FILD LVTTL 3 mA Field output 3-state RDEO LVTTL 3 mA Effective pixel range output 3-state PDP-5071PU...
  • Page 210 3 mA Address output for external memory -SDRA11 3-state Insert a damping resistor of approximately 100Ω, 13,12,10,9,8, and connect to the SDRAM address terminal. 7,6,5 SDRDQ0 51,49,46,42, LVTTL 6 mA Data input/output for external memory. 3-state -SDRDQ15 40,36,34,30, 31,35,37,41, 43,47,50,52 PDP-5071PU...
  • Page 211 (Not to Scale) BLUE <7> SOGIN BLUE <6> BLUE <5> BLUE <4> BLUE <3> BLUE <2> BLUE <1> BLUE <0> 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 PDP-5071PU...
  • Page 212 1, 10, 20, 21, 24, 25, 28, 32, 36, 40, 41, 44, 47, 50, 53, 60, 61, 63, 68, 80 Control Serial Port Data I/O 3.3 V CMOS Serial Port Data Clock (100 kHz Maximum) 3.3 V CMOS Serial Port Address Input 1 3.3 V CMOS PDP-5071PU...
  • Page 213 Hsync is active; the trailing edge is ignored. When Hsync Polarity = 0, the falling edge of Hsync is used. When Hsync Polarity = 1, the rising edge is active. The input includes a Schmitt trigger for noise immunity, with a nominal input threshold of 1.5 V. VSYNC Vertical Sync Input The input for vertical sync. PDP-5071PU...
  • Page 214 The designer should provide quiet, noise-free power to these pins. Ground The ground return for all circuitry on-chip. It is recommended that the AD9985 be assembled on a single solid ground plane, with careful attention given to ground current paths. PDP-5071PU...
  • Page 215 Control Signals EVNODD Video Color HS,VS, HSYNC Space Converter VSYNC R0XC ± PanelLink 24-Bit Up/Down ODCK Data TMDS Sampling R0X0 ± Q[23:0] Digital R0X1 ± CLK48B Core R0X2 ± Auto A/V Port Exception MUTEOUT Handling Detect SCDT R0PWR5V R1PWR5V PDP-5071PU...
  • Page 216 CGND DSDA1 CSCL CSDA IOVCC IOGND CGND CVCC18 CVCC18 SiI 9023 MCLKOUT CGND IOVCC 144-Pin IOGND CGND TQFP CVCC18 IOVCC AUDPVCC18 IOGND AUDPGND XTALOUT XTALIN XTALVCC REGVCC EVNODD RSVDL RESET# SCDT IOVCC CVCC18 IOGND VSYNC CGND CLK48B HSYNC IOGND PDP-5071PU...
  • Page 217 Output LVTTL Output LVTTL Output LVTTL Output LVTTL Output LVTTL Output LVTTL Output Data enable. HSYNC LVTTL Output Horizontal Sync Output control signal. VSYNC LVTTL Output Vertical Sync Output control signal. ODCK 12 mA LVTTL Output Output Data Clock. PDP-5071PU...
  • Page 218 2. CLK48B is used to clock external 24-to-48 bit latches. CLK48B is also latched on the rising edge of RESET# to set the I2C device addresses for CSCL/CSDA. Refer to Table 10. CLK48B has a weak internal pull-down, and so will be latched as a LOW if not otherwise connected. PDP-5071PU...
  • Page 219 PVCC1 Power TMDS Port 1 PLL VCC 3.3V TMDSPGND Ground TMDS PLL GND AUDPVCC18 Power ACR PLL VCC 1.8V AUDPGND Ground ACR PLL GND XTALVCC Power ACR PLL Crystal Input VCC 3.3V REGVCC Power ACR PLL Regulator VCC 3.3V PDP-5071PU...

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