Cisco HyperSwitch A100 User Manual page 166

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Figure
Guaranteed
Best
effort
Note
SRAMs
Five
Table
Priority
Level
IBGi
when
Served
back
exceeded
Normal
level
When BP
received
is
Cell
output
inhibited
MUX/DMUX
Card Block
B-2
MI0
PA20
G/B1
pA215
Mlo
G/B1
G/B1Ml0
Ml0
PA20
G/B1
PA215
G/B0 MI0
Ml1
G/B0
SRAM
LINF2I
IIx-
2i1
LINF
MUX
The
random-access
static
memory
32Kx9
each
of
bits save
Which
Conditions
B-i
in
IBGM
BP
not
received
is
pressure
Diagram
iiThjM
j1jj_
iiim
________
_____ ________
_____ ____
_______________________________
LSI
SRAM
an input
comprises
2K
and
cell
switch-specific
FIFO Queues
Served
are
IBBi
and
threshold
is
Served
exceeded
Normal
When
BP
Functions
the
of
Expandable
BPB
0-15
BPGM
BPB
0-15
BPBM
SW
ATOM
DMUX
buffer
shared
by two
overhead
data
IBBM
BP
when
and
not
received
threshold
is
level
received
is
ATM
Buffer Modular
Output
MUX/DMUX
lines
is
B-3
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