Epson S5U1C60N08D Manual page 45

Cmos 4-bit single chip microcomputer
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Mne-
Classification
Operand
monic
B
Index
CP
XH, i
1
operation
XL, i
1
instructions
YH, i
1
YL, i
1
Data
LD
r, i
1
transfer
r, q
1
instructions
A, Mn
1
B, Mn
1
Mn, A
1
Mn, B
1
LDPX
MX, i
1
r, q
1
LDPY
MY, i
1
r, q
1
LBPX
MX,
l
1
Flag
SET
F, i
1
operation
RST
F, i
1
instructions
SCF
1
RCF
1
SZF
1
RZF
1
SDF
1
RDF
1
EI
1
DI
1
Stack
INC
SP
1
operation
DEC
SP
1
instructions
PUSH
r
1
XP
1
XH
1
XL
1
YP
1
YH
1
YL
1
F
1
POP
r
1
XP
1
XH
1
XL
1
YP
1
S5U1C60N08D MANUAL
(DEVELOPMENT SOFTWARE TOOL FOR S1C60N08)
Operation Code
A
9
8
7
6
5
4
3
2
1
0
1
0
0
1
0
0
i3
i2
i1
0
1
0
0
1
0
1
i3
i2
i1
0
1
0
0
1
1
0
i3
i2
i1
0
1
0
0
1
1
1
i3
i2
i1
1
1
0
0
0
r1
r0
i3
i2
i1
1
1
0
1
1
0
0
r1
r0
q1
q0
1
1
1
1
0
1
0
n3
n2
n1
n0
1
1
1
1
0
1
1
n3
n2
n1
n0
1
1
1
1
0
0
0
n3
n2
n1
n0
1
1
1
1
0
0
1
n3
n2
n1
n0
1
1
0
0
1
1
0
i3
i2
i1
1
1
0
1
1
1
0
r1
r0
q1
q0
1
1
0
0
1
1
1
i3
i2
i1
1
1
0
1
1
1
1
r1
r0
q1
q0
0
0
1
l l l l l l l l
7
6
5
4
3
2
1
1
1
1
0
1
0
0
i3
i2
i1
1
1
1
0
1
0
1
i3
i2
i1
1
1
1
0
1
0
0
0
0
0
1
1
1
0
1
0
1
1
1
1
1
1
1
0
1
0
0
0
0
1
1
1
1
0
1
0
1
1
1
0
1
1
1
0
1
0
0
0
1
0
1
1
1
0
1
0
1
1
0
1
1
1
1
0
1
0
0
1
0
0
1
1
1
0
1
0
1
0
1
1
1
1
1
1
1
0
1
1
0
1
1
1
1
1
1
0
0
1
0
1
1
1
1
1
1
0
0
0
0
r1
1
1
1
1
1
0
0
0
1
0
1
1
1
1
1
0
0
0
1
0
1
1
1
1
1
0
0
0
1
1
1
1
1
1
1
0
0
0
1
1
1
1
1
1
1
0
0
1
0
0
1
1
1
1
1
0
0
1
0
0
1
1
1
1
1
0
0
1
0
1
1
1
1
1
1
0
1
0
0
r1
1
1
1
1
1
0
1
0
1
0
1
1
1
1
1
0
1
0
1
0
1
1
1
1
1
0
1
0
1
1
1
1
1
1
1
0
1
0
1
1
APPENDIX A. S1C60N08 INSTRUCTION SET
Flag
Clock
0
I D Z C
i0
7
XH-i3~i0
i0
7
XL-i3~i0
i0
7
YH-i3~i0
i0
7
YL-i3~i0
i0
5
r
i3~i0
5
r
q
5
A
M(n3~n0)
5
B
M(n3~n0)
5
M(n3~n0)
5
M(n3~n0)
i0
5
M(X)
i3~i0, X
5
r
q, X
X+1
i0
5
M(Y)
i3~i0, Y
5
r
q, Y
Y+1
0
5
M(X)
l
3~ 0, M(X+1)
i0
7
F
F i3~i0
i0
7
F
F i3~i0
1
7
C
1
0
7
C
0
0
7
Z
1
1
7
Z
0
0
7
D
1 (Decimal Adjuster ON)
1
7
D
0 (Decimal Adjuster OFF)
0
7
I
1 (Enables Interrupt)
1
7
I
0 (Disables Interrupt)
1
5
SP
SP+1
1
5
SP
SP-1
r0
5
SP
SP-1, M(SP)
0
5
SP
SP-1, M(SP)
1
5
SP
SP-1, M(SP)
0
5
SP
SP-1, M(SP)
1
5
SP
SP-1, M(SP)
0
5
SP
SP-1, M(SP)
1
5
SP
SP-1, M(SP)
0
5
SP
SP-1, M(SP)
r0
5
r
M(SP), SP
0
5
XP
M(SP), SP
1
5
XH
M(SP), SP
0
5
XL
M(SP), SP
1
5
YP
M(SP), SP
EPSON
Operation
A
B
X+1
Y+1
l
l
7~ 4, X
l
X+2
r
XP
XH
XL
YP
YH
YL
F
SP+1
SP+1
SP+1
SP+1
SP+1
39

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