Epson S5U1C60N08D Manual page 47

Cmos 4-bit single chip microcomputer
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Abbreviations used in the explanations have the following meanings.
Symbols associated with registers and memory
A
A register
B
B register
X
XHL register
(low order eight bits of index register IX)
Y
YHL register
(low order eight bits of index register IY)
XH
XH register
(high order four bits of XHL register)
XL
XL register
(low order four bits of XHL register)
YH
YH register
(high order four bits of YHL register)
YL
YL register
(low order four bits of YHL register)
SP
Stack pointer SP
SPH
High-order four bits of stack pointer SP
SPL
Low-order four bits of stack pointer SP
MX, M(X) Data memory whose address is specified
with index register IX
MY, M(Y) Data memory whose address is specified
with index register IY
Mn, M(n) Data memory address 000H–00FH
(address specified with immediate data n of
00H–0FH)
M(SP)
Data memory whose address is specified
with stack pointer SP
r, q
Two-bit register code
r, q is two-bit immediate data; according to
the contents of these bits, they indicate
registers A, B, and MX and MY (data
memory whose addresses are specified with
index registers IX and IY)
r
r1
r0
0
0
0
1
1
0
1
1
S5U1C60N08D MANUAL
(DEVELOPMENT SOFTWARE TOOL FOR S1C60N08)
q
Register
q1
q0
specified
0
0
A
0
1
B
1
0
MX
1
1
MY
EPSON
APPENDIX A. S1C60N08 INSTRUCTION SET
Symbols associated with program counter
NBP
New bank pointer
NPP
New page pointer
PCB
Program counter bank
PCP
Program counter page
PCS
Program counter step
PCSH
Four high order bits of PCS
PCSL
Four low order bits of PCS
Symbols associated with flags
F
Flag register (I, D, Z, C)
C
Carry flag
Z
Zero flag
D
Decimal flag
I
Interrupt flag
Flag reset
Flag set
Flag set or reset
Associated with immediate data
p
Five-bit immediate data or label 00H–1FH
s
Eight-bit immediate data or label 00H–0FFH
l
Eight-bit immediate data 00H–0FFH
i
Four-bit immediate data 00H–0FH
Associated with arithmetic and other operations
+
Add
-
Subtract
Logical AND
Logical OR
Exclusive-OR
Add-subtract instruction for decimal
operation when the D flag is set
41

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