Rx (05P0703) - Furuno DSC-60 Service Manual

Dsc/watch receiver
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3.2 RX (05P0703)

The DSC watch keeping receiver PCB and DSC general watch keeping receiver PCB are the same PCB
and have the same specifications. This board is composed of a receiver (RF amplification to detection
circuit), synthesizer, and generator of self-test signal of this board.
"OVEN" voltage is supplied to the 36MHz reference oscillator, Y501 in the synthesizer circuit directly
from 24V ship's mains. On/off status of oven voltage can be checked by the [OVEN] LED on the front
panel. Frequency of the receiver can be adjusted by changing the frequency of this reference oscillator,
but it does not require adjustment in principle. Error of receiving frequency is within +10Hz, using
AFSK signal output from the receiver: 1700Hz +85Hz.
Receiver circuit
Protection circuit
Protection circuit
Protection circuit
Protection circuit
Protection circuit
The receiver antenna input circuit is equipped with an excessive input protection circuit consisting of an
arrestor (E1) and diode (CR4 and CR5). CR4 and CR5 are operated at 18Vp-p, and E1 at 90Vp-p.
The input circuit can receive a signal of 30 Vrms for 15 minutes.
"ACTIVE ANT " setting
"ACTIVE ANT " setting
"ACTIVE ANT " setting
"ACTIVE ANT " setting
"ACTIVE ANT " setting
12V DC power supply of the active receiver antenna (FAX-5) is output by setting the jumper plug of
P1(J3) for "ACTIVE".
Signal flow
Signal flow
Signal flow
Signal flow
Signal flow
The DSC signal from the antenna (F +85Hz), passing through an HPF of 1.6MHz and LPF of 13.5MHz
or 27.5MHz composed of L/C, is RF amplified at Q2 and Q3 (voltage gain of 12dB approx.) and is
input to the frequency conversion circuit of CR6.
Here, the DSC signal of F +85Hz is converted into primary intermediate frequency 54.455MHz +85Hz,
using the local oscillator (F + 54.455MHz), and is input to U2 via FL1 (54.455MHz) and Q4 circuit.
U2, BA4116FV incorporates a MIX, IF, and detection circuits.
The signal of 54.455MHz +85Hz is converted into secondary intermediate frequency of 455kHz
+85Hz, using the second local oscillator (54MHz), further detected by the third local oscillator
(456.7KHz) to produce the AFSK signal of 1700Hz +85Hz.
This signal is amplified at the next stage BPF, U3 and U4, and is input to the modem circuit on the
CONTROL/MODEM board.
The input level is 0dBm, 600 ohms in standard, while DSC signal can be detected if input to the modem
circuit is more than -30dBm.
When the self-test is conducted, the carrier signal of 18MHz is combined between patterns and is input
to the antenna circuit. The input level is equal to approx. 0 dbuV of SG level.
Key points:
Key points:
Key points:
Key points:
Key points:
- Antenna input: J2B, F1B, F +85Hz, 0dBuV/50ohms, character error rate 1% or less
- AF output: AFSK 1700Hz +85Hz, 0dBm, 600 ohms
- Primary intermediate frequency: 54.455MHz
- Secondary intermediate frequency: 455kHz
- Local oscillator: F +54.455MHz
- Second local oscillator: 54MHz
- Third local oscillator: 456.7kHz
- Self-test signal: 18MHz carrier signal
3. Function and overview of each board
2-5

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