Cache Memory - TYAN InterServe 90 User Manual

Tyan computer system board manual
Table of Contents

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Chapter 3
Onboard Resource Settings
NOTE: Table below shows only some of the possible memory configurations.
D
I
M
M
B
a
n
k
1
8
M
B
1 x
8
M
B
1 x
8
M
B
1 x
1
6
M
B
1 x
1
6
M
B
1 x
1
6
M
B
1 x
3
2
M
B
1 x
3
2
M
B
1 x
3
2
M
B
1 x
6
4
M
B
1 x
6
4
M
B
1 x
6
4
M
B
1 x
1
2
8
M
B
1 x
1
2
8
M
B
1 x
1
2
8
M
B
1 x
2
5
6
M
B
1 x
2
5
6
M
B
1 x
2
5
6
M
B
1 x
2
5
6
M
B
1 x
Warning! The 256MB DIMMs represented above are REGISTERED memory
chips. DO NOT use registered and non-registered memory chips simulta-
neously! (Check with your memory dealer for more information).

Cache Memory

Penitum II processors have the L2 (Level 2) cache built into their architecture,
so there is no need for an L2 cache on the motherboard. The Pentium II
processor has a physical L2 cache size of 512KB and a cacheable memory area
of 512MB. The Celeron CPU may have no onboard L2 cache or 128KB.
D
I
M
M
D
I
M
M
B
a
n
k
2
B
a
n
k
0
0
8
M
B
1 x
0
8
M
B
1 x
8
M
B
1 x
8
M
B
1 x
8
M
B
1 x
1
6
M
B
1 x
8
M
B
1 x
1
6
M
B
1 x
1
6
M
B
1 x
1
6
M
B
1 x
1
6
M
B
1 x
3
2
M
B
1 x
1
6
M
B
1 x
3
2
M
B
1 x
3
2
M
B
1 x
3
2
M
B
1 x
3
2
M
B
1 x
6
4
M
B
1 x
3
2
M
B
1 x
6
4
M
B
1 x
6
4
M
B
1 x
6
4
M
B
1 x
6
4
M
B
1 x
1
2
8
M
B
1 x
6
4
M
B
1 x
1
2
8
M
B
1 x
1
2
8
M
B
0
0
2
5
6
M
B
1 x
0
2
5
6
M
B
1 x
2
5
6
M
B
2
5
6
M
B
1 x
2
5
6
M
B
34
D
I
M
M
3
B
a
n
k
4
0
0
0
0
8
M
B
1 x
0
0
1
6
M
B
3
2
M
B
0
0
0
0
0
1 x
0
0
0
0
1 x
1
1 x
2
5
6
M
B
1 x
T
t o
l a
8
M
B
1
6
M
B
2
4
M
B
3
2
M
B
4
8
M
B
4
8
M
B
6
4
M
B
9
6
M
B
1
2
8
M
B
1
2
8
M
B
1
6
0
M
B
1
9
2
M
B
2
5
6
M
B
3
2
0
M
B
3
8
4
M
B
5
1
2
M
B
6
4
0
M
B
7
6
8
M
B
0
2
4
M
B
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