Supermicro X11SCW-F User Manual page 76

Super X11SCW-F User's Manual
Power Limit Scale
Use this feature to select the scale used for the slot power limit value. The options are
1.0x, 0.1x, 0.01x, and 0.001x.
Physical Slot Number
Use this feature to set the physical slot number attached to this port. Press "+" or "-" on
your keyboard to change the setting to a value between 0-8191. The default setting will
be dependent on the number of ports available.
Max Payload Size
Select Auto for the system BIOS to automatically set the maximum payload value for a
PCI-E device to enhance system performance. The options are Auto, 128, and 256 TLP.
Program PCIe ASPM After OPROM
PCIe ASPM, the Active State Power Management for PCI-Express slots, is a power
management protocol used to manage power consumption of serial-link devices installed
on PCI-E slots during a prolonged off-peak time. If this feature is set to Enabled, PCI-E
ASPM will be programmed after OPROM. If this feature is set to Disabled, the PCI-E
ASPM will be programmed before OPROM. The options are Disabled and Enabled.
VT-d
Select Enable to use Intel Virtualization Technology for Direct I/O VT-d support by reporting
the I/O device assignments to the VMM (Virtual Machine Monitor) through the DMAR
ACPI tables. This feature offers fully-protected I/O resource sharing across Intel platforms,
providing greater reliability, security, and availability in networking and data-sharing. The
options are Disabled and Enabled.
SW Guard Extensions (SGX)
Select Enabled to activate Software Guard Extensions (SGX) support. The options are
Disabled, Enabled, and Software Controlled.
Select Owner EPOCH Input Type
There are three Owner EPOCH modes (each EPOCH is 64 bit). The options are No Change
in Owner EPOCHs, Change to New Random Owner EPOCHs, and Manual User Defined
Owner EPOCHs.
GNA Device (B0:D8:F0)
This feature enables the SA GNA device. The options are Enabled and Disabled.
X2APIC Opt Out
X2APIC, an extension of the XAPIC architecture, is designed to support 32-bit processor
addressability. X2APIC enhances the performance of interrupt delivery. The options are
Enabled and Disabled.
76