Code Of Slavei2C_Prepareforinter - Fujitsu F2MC-8FX Series Application Note

4.6.11 Code of SlaveI2C_PrepareForInter

ICCR1_EN = 0;
ILSR_P16 = 1;
ILSR_P17 = 1;
DDR1_P16 = 0;
DDR1_P17 = 0;
ICCR1_EN
ICCR1_CS4 = 0;
ICCR1_CS3 = 1 ;
ICCR1_CS2 = 0;
ICCR1_CS1 = 0;
ICCR1_CS0 = 0;
+2)
ICCR1_EN
IDDR1 = 0x00;
IBCR01 = 0x05;//0x04;
cycles,
IBCR11 = 0x4A;
bit,
interrupt
MB2146-460-E Setup Guide V1.2
Chapter 4 Sample Code Manual
//coms level
= 0; // clear I2C interface
// set clock divider 'm' => 6
// set clock divider 'n' => 4
// Fsck = MCLK / (m * n +2) => 3MHz/(6*4
//= 3MHz/26 = 115kHz
= 1; // enable I2C interface
// clear data register
// enable address acknowledge bit,
// transfer completion interrupt after nine
// enable stop detection interrupt
// set slave mode, enable data acknowledge
// enable bus error and transfer complete
MCU-AN-500083-E-12 – Page 45