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Contec SBC Series User Manual

Nlx bus sbc for socket370 cpu with lan/vga
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SBC Series
NLX BUS SBC for Socket370 CPU
with LAN/VGA
PC-686BX(NLX)-LV
PC-686BX(NLX)-LVV
User's Manual
CONTEC CO.,LTD.

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Summary of Contents for Contec SBC Series

  • Page 1 SBC Series NLX BUS SBC for Socket370 CPU with LAN/VGA PC-686BX(NLX)-LV PC-686BX(NLX)-LVV User’s Manual CONTEC CO.,LTD.

  • Page 2: Trademarks

    No part of this document may be copied or reproduced in any form by any means without prior written consent of CONTEC Co., LTD. CONTEC Co., LTD. makes no commitment to update or keep current the information contained in this document.

  • Page 3: Product Configuration

    This board is specially packed in an anti-static bag to prevent damage in shipping. Check the contents to make sure that you have everything listed above. If you do not have all the items, contact your distributor or CONTEC group office where you purchased.

  • Page 4: Table Of Contents

    Table of Contents Copyright................i Trademarks ................ i Product Configuration ............ii 1. Introduction ..............1 Features ................ 1 Limited Three-Years Warranty........2 How to Obtain Service..........3 Liability................. 3 Warning................. 3 Handling Precautions........... 3 Structure of This Manual..........4 2. Specifications ..............5 Functional Specifications ..........
  • Page 5 External Battery Connector: CN10 ....... 24 4. Jumper Settings ............25 Watchdog Timer Output Selector: JP6 ......25 RS-232C/422/485 Selector Switch: JP1/JP2 ....26 Transmit Data Control for Half-Duplex Mode..26 RS-422/RS-485 Receiver Disable Control Jumper Setting .... 27 I/O Addresses and Commands ........28 RS-422/485 Terminating Resistance: JP3 .....
  • Page 6 BIOS Features Setup............61 Chipset Features Setup..........65 Integrated Peripherals ........... 69 Power Management Setup ..........72 PnP/PCI Configuration Setup ........76 Defaults Menu ..............79 Load BIOS Defaults ........... 79 Load SETUP Defaults ..........79 Supervisor/User Password Setting ........ 79 Exit Options ..............
  • Page 7 PC-686BX(NLX)-LV, PC-686BX(NLX)-LVV...

  • Page 8: Introduction

    1. Introduction 1. Introduction Thank you for purchasing the PC-686BX(NLX) board. The PC-686BX(NLX) is a single-board computer supporting Intel Celeron 300MHz and higher and Pentium III 500MHz and higher processors. Please read this manual carefully before connecting to external devices and configuring systems.

  • Page 9: Limited Three-Years Warranty

    - PS/2 keyboard (MINI-DIN 6-pin) Limited Three-Years Warranty CONTEC Interface boards are warranted by CONTEC Co., LTD. to be free from defects in material and workmanship for up to three years from the date of purchase by the original purchaser.

  • Page 10: How To Obtain Service

    For replacement or repair, return the device freight prepaid, with a copy of the original invoice. Please obtain a Return Merchandise Authorization Number (RMA) from the CONTEC group office where you purchased before returning any product. * No product will be accepted by CONTEC group without the RMA number. Liability The obligation of the warrantor is solely to repair or replace the product.

  • Page 11: Structure Of This Manual

    1. Introduction - Install the board in an NLX bus expansion slot on the backplane board. - Do not insert or remove the board from the slot while the main power is turned on as this may damage the board. Always turn off the power to the PC beforehand.

  • Page 12: Specifications

    2. Specifications 2. Specifications Functional Specifications Table 2.1. Functional Specifications < 1 / 2 > Item Specification Processor socket Socket370 Intel Celeron 300 to 850MHz CPU (Option) Pentium III 500 to 850MHz (FSB100MHz) Bus speed 66 MHz/100 MHz Celeron CPU contains internal 128KB L2 cache Cache Pentium III CPU contains internal 256KB L2 cache Memory (Option)

  • Page 13: General Specifications

    2. Specifications Table 2.1. Functional Specifications < 2 / 2 > Item Specification Intel 82559 LAN interface 1 x RJ-45 connector Wake On LAN support (Only when ATX power supply used) USB interface Supports 2 x USB ports pin header 10-pin (USB connector cable sold separately) Timeout settings : Watchdog Selectable 0, 2, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, or 30 seconds...

  • Page 14: Power Management

    2. Specifications Power Management The PIIX4 power management function provides system designers with a range of different functions and configuration options for implementing various power saving modes. PIIX4 performs the following four general types of power management. - Clock control and processor complex management - Peripheral device management - System management (SMI generation, system management bus) - System shutdown and restart...
  • Page 15 2. Specifications - Three different shutdown states are available: - Power-on shutdown (POS) (Three system reset options are provided.) - RAM shutdown (STR) - Disk shutdown (STD) or software OFF (Soff) - Long duration standby timer used as a restart timer to monitor the overall idle state of the system (Continues to operate during shutdown) - Power button input...

  • Page 16: Power Supply Requirements

    2. Specifications Power Supply Requirements A clean and stable power supply is required to ensure reliable operation due to the high CPU clock frequencies used on the board. The quality of the power supply is even more important. To achieve the maximum performance from such high-speed CPUs, ensure that the DC power supply remains within the range 4.75V to 5.25V.

  • Page 17: Board Component Names

    2. Specifications Board Component Names DIMM1 DIMM2 MOUSE JP10 CN10 J1, CN8 are not used. Please do not connect anything. Figure 2.1. Component Names PC-686BX(NLX)-LV, PC-686BX(NLX)-LVV...

  • Page 18: Block Diagram

    2. Specifications Block Diagram SOCKET370 CLK GEN. GTL+BUS 443BX DIMM x 2 TERMINATOR PCI bus USB #1, #2 PIIX4E (82371EB) (82559) (69030 / 69000 *) IDE #1, #2 ISA bus COM #1, #2 BIOS MONITOR SUPER I/O (W83977TF) KB / MS * 69000 is used for PC-686BX(NLX)-LV.
  • Page 19 2. Specifications PC-686BX(NLX)-LV, PC-686BX(NLX)-LVV...

  • Page 20: Hardware Description

    3. Hardware Description 3. Hardware Description This chapter describes the board jumper settings and connectors required to setup the board for operation. Installation Procedure (1) Install the processor making sure it is oriented correctly. (2) Install the DRAM modules making sure they are oriented correctly.

  • Page 21: Cpu Installation

    CPU board via a 370-pin ZIF PPGA socket. The CPU board supports the processors listed in the table below. Table 3.1. Processor List Processor Processor Host Bus Cache Size CONTEC Model Speed Frequency Celeron 433MHz 66MHz 128KB...

  • Page 22: Main Memory Installation:dimm1 And Dimm2

    3. Hardware Description Main Memory Installation: DIMM1 and DIMM2 The board provides two dual in-line memory module (168-pin DIMM) sockets giving a maximum memory size of 512MB. The BIOS determines the SDRAM size and speed using in the serial presence detection (SPD) data structure set in E2PROM on the DIMM.

  • Page 23: Parallel Port Connector: Cn1

    3. Hardware Description Parallel Port Connector: CN1 The parallel port bracket can be used to add an additional parallel port for connecting additional parallel devices. The following four options are provided for parallel port operation. - Compatible (Standard mode) - Bidirectional (PS/2 compatible) - Bidirectional EPP.

  • Page 24: Serial Port Connector: Cn2/Cn3

    3. Hardware Description Serial Port Connector: CN2/CN3 COM1 (CN2) and COM2 (CN3) are on-board serial ports with 10-pin box head connectors. The table below shows the pin layout for these connectors. Table 3.4. COM2(CN3) COM1(CN2) Serial Port Connector RS-232C RS-422 RS-485 RS-232C RTS-...

  • Page 25: Rs-485 Specifications

    3. Hardware Description RS-422 / RS-485 Specifications - Transmission system: Half or full duplex serial transfer complying with RS-422 or RS-485 - Baud rate: 19200 to 50 bps (Selectable) - Signal transmission distance: 1.2km max. Note! The mouse and keyboard can be plugged into either PS/2 connector. However, the power must be turned off before connecting or disconnecting the keyboard or mouse.

  • Page 26: Usb Connector: Cn4

    3. Hardware Description USB Connector: CN4 The universal serial bus (USB) is able to automatically detect plug and play computer peripherals (such as a keyboard, mouse, joystick, scanner, printer, modem/ISDN, CD- ROM, or floppy disk drive) when they are physically connected without the need to reboot or install a driver.

  • Page 27: Keyboard Connector: Cn11

    3. Hardware Description Table 3.5. CN4: USB Connector Pin No. Function Pin No. Function USBP0- USB1- USBP0+ USB1+ USBG USBG Refer to "Chapter 8. Available Accessories" for a list of USB connector cables. Keyboard Connector: CN11 The CPU board has a standard PS/2 keyboard MINI DIN connector for attaching the keyboard.

  • Page 28: Ps/2 Mouse Connector: Cn6

    3. Hardware Description PS/2 Mouse Connector: CN6 The CPU board has a standard PS/2 mouse MINI DIN connector for attaching a PS/2 mouse. The PS/2 mouse can be plugged directly into this connector. The connector pin layout is shown below. Table 3.7.

  • Page 29: Lcd Connector: Cn5

    DP17 DP22 DP18 DP23 DP19 DP10 DP11 DP12 SHFCLK +3.3V DP13 +3.3V ENABLK DP14 LCDVDD ENVEE DP15 +12V +12V N.C. If using the CONTEC digital-input flat panel display series, a special adapter board (ADPLNK(PC), sold separately) is required. PC-686BX(NLX)-LV, PC-686BX(NLX)-LVV...

  • Page 30: Vga Connector: Cn7

    3. Hardware Description VGA Connector: CN7 This is a HD-SUB15 (female) VGA CRT connector. The connector pin layout is shown below. Table 3.10. CN7: VGA Connector PIN No. Function PIN No. Function GREEN BLUE Pull up to 5V Pull up to 5V D-DATA H-SYNC V-SYNC...

  • Page 31: External Battery Connector: Cn10

    3. Hardware Description External Battery Connector: CN10 This 2-pin connector is used to connect an external battery. The external battery is used to supply power to the realtime clock and CMOS memory. Table 3.12. CN10: External Battery Connector Pin No. Function CN10 Housing : XHP-2(JST)

  • Page 32: Jumper Settings

    4. Jumper Settings 4. Jumper Settings Watchdog Timer Output Selector: JP6 The watchdog timer output is triggered if the watchdog timer times out due to a runaway program or other reason. JP6 selects whether the timeout output generates an NMI or a system reset. Note, however, that Windows 2000 and Windows NT do not support NMIs.

  • Page 33: Rs-232C/422/485 Selector Switch: Jp1/Jp2

    4. Jumper Settings RS-232C/422/485 Selector Switch: JP1/JP2 Table 4.2. JP1/JP2: RS-232C/422/485 Selector Switch 2 4 6 8 10 2 4 6 8 10 12 14 16 18 20 22 24 RS-232C (Default) 1 3 5 7 9 1 3 5 7 9 11 13 15 17 19 21 23 2 4 6 8 10 2 4 6 8 10 12 14 16 18 20 22 24 RS-422...

  • Page 34: Jumper Setting

    4. Jumper Settings RS-422/RS-485 Receiver Disable Control Jumper Setting The RTS signal is used for driver enable control when using the RS-422/RS-485 port. Connecting pin 4 and pin 6 of JP2 disables the receiver and prevents the port from receiving output data to external devices. RTS# COM2 JP2: 7-8...

  • Page 35: I/O Addresses And Commands

    4. Jumper Settings I/O Addresses and Commands The table below lists the I/O addresses used by COM2. Table 4.3. I/O Addresses Register I/O Address DLAB Read/Write Transmitter hold register 02F8H Receiver buffer register Divisor latch register (LSB) Divisor latch register (MSB) 02F9H Interrupt enable register 02FAH...

  • Page 36: On-Board Lan Selector: Jp7

    4. Jumper Settings On-Board LAN Selector: JP7 When using, please set JP7 short all the time. Table 4.5. JP7: On-Board LAN Selector Function Enable (default) Impossible to setting Disk On Chip Memory Address Selector: JP4 JP4 is used to select the memory address for the Disk On Chip. The following four Disk On Chip memory address settings are available.

  • Page 37: Display Type Setting: Jp5

    The board supports a range of different LCD display resolutions. Use JP5 to select the type of display. Table 4.7. JP5: Display Type Setting LCD Type Resolution CONTEC Model 1024 x 768 XGA IPC-DT/H40X(PC)T IPC-DT/L40S(PC)T 800 x 600 CRT only...

  • Page 38: Cmos Memory Erase: Jp8

    4. Jumper Settings CMOS Memory Erase: JP8 The date, time, and CMOS settings can be specified using the Setup program. The Setup program can reset the CMOS settings to their default values. The RAM data includes a password and is powered by the on-board button cell battery. The CMOS memory can be erased by shorting pins 2 and 3 on JP8 together.

  • Page 39: Power Supply At/Atx Selector: Jp10

    4. Jumper Settings Table 4.10. JP10: Power Supply AT/ATX Selector JP10 Function ATX Power Supply(Default) 1 2 3 AT Power Supply 1 2 3 LED Display: LNK/ACT : TX&RX 100M : 100BASE-T Bracket LNK/ACT 100M Figure 4.3. LED Display PC-686BX(NLX)-LV, PC-686BX(NLX)-LVV...

  • Page 40: Cpu Board Resources

    5. CPU Board Resources 5. CPU Board Resources I/O Map Table 5.1. I/O Port Address Map Address (hex) Description Size 0000 ~ 000F 16 bytes DMA controller 0020 ~ 0021 2 bytes Interrupt control (PIC) 002E ~ 002F 2 bytes Super I/O controller configuration register 0040 ~ 0043 4 bytes...

  • Page 41: Memory Map

    5. CPU Board Resources Memory Map Table 5.2. Memory Map Address Range (h) Size Description 100000-18000000 512MB Expanded memory E8000-FFFFF 96KB System BIOS E0000-E7FFF 32KB System BIOS (Can be used for UMB) Available DOS high memory C8000-DFFFF 96KB (Available to ISA bus and PCI bus) A0000-C7FFF 160KB Video memory and BIOS...

  • Page 42: Pci Configuration Space Map

    5. CPU Board Resources PCI Configuration Space Map Table 5.4. PCI Configuration Space Map Description Bus No. Device No. Function No. Intel 82443BX (PAC) Intel 82443BX PCI bridge (For A.G.P) Intel 82371EB(PIIX4E) PCI/ISA bridge Intel 82371EB(PIIX4E) IDE bridge Intel 82371EB(PIIX4E) USB Intel 82371EB(PIIX4E) power management PCI expansion slot 1 PCI expansion slot 2...

  • Page 43: Pci Interrupt Routing Map

    5. CPU Board Resources PCI Interrupt Routing Map This section describes interrupt sharing and how interrupt signals are connected between the PCI expansion slots and on-board PCI devices. The PCI specification stipulates how interrupts are shared between devices connected to the PCI bus. In most cases, the additional delay time caused by sharing an interrupt does not affect device operation or throughput.
  • Page 44 5. CPU Board Resources Table 5.6. PCI Interrupt Routing Map PIIX4E Power 1st PCI 2nd PCI 3rd PCI 4th PCI A. G. P. PIRQ Manage- Slot Slot Slot Slot Audio Slot signal l ment PIRQA INTA INTD INTC INTB INTA INTA PIRQB INTB...
  • Page 45 5. CPU Board Resources PC-686BX(NLX)-LV, PC-686BX(NLX)-LVV...

  • Page 46: Software Utilities

    6. Software Utilities 6. Software Utilities This chapter describes the software utilities provided with the CPU board. These include the 10/100M Ethernet driver, Intel 440BX chipset core PCI&ISA PnP service and graphics driver for the CRT/flat panel driver, and watchdog timer configuration utility.

  • Page 47: Graphics Driver

    6. Software Utilities Graphics Driver The CPU board uses a Chips 69030 (used for PC-686BX(NLX)-LVV) and 69000 (used for PC-686BX(NLX)-LV) in the PCI board VGA / LCD design. The 69030 and 69000 incorporates high-speed memory technology for the graphics frame buffer. The 69030 and 69000 combines the latest flat panel controller technology, based on the well-established HiQVideo graphics accelerator core, with memory that features both high performance and low power consumption.

  • Page 48: Lan Driver

    - Microsoft Windows for Workgroups (NDIS2.01) Yes (*1) - Microsoft Windows NT3.51, NT4.0 - Microsoft Windows 95/98 (NDIS4, 5) - Novell NetWare 3.12 Server - Novell NetWare 4.1, 5 Server - Novell NetWare DOS ODI Client Operation not verified by CONTEC. PC-686BX(NLX)-LV, PC-686BX(NLX)-LVV...
  • Page 49 6. Software Utilities LAN Drivers - Windows 98, Windows 95(OSR 2.x), Windows 95(Retail), Windows 95(OSR1), Windows NT 4.0, Windows NT 3.51 CD-ROM directory: \LAN - DOS CD-ROM directory: \DOS - NetWare client CD-ROM directory: \DOS - NetWare server CD-ROM directory: \NWSERVER - Windows 2000 Please use the standard LAN driver included with the OS.

  • Page 50: Watchdog Timer (Wdt) Setup

    6. Software Utilities Watchdog Timer (WDT) Setup Watchdog timers are widely used in industrial applications to monitor CPU activity. The application software uses an appropriate timer setting to trigger the WDT. In a normally functioning system, the system reloads the WDT before it times out. Accordingly, the WDT time out never occurs in a normally functioning system.

  • Page 51: Upgrading The Bios To A New Version

    6. Software Utilities Upgrading the BIOS to a New Version Step 1: Make a note of the initial or existing BIOS setup parameters. Press the DEL key during the power-on self test to run the Setup program and make a note of all the parameter values.

  • Page 52: Hardware Monitoring

    6. Software Utilities Hardware Monitoring Hardware monitoring is incorporated into the hardware monitoring controller (Winbond W83781D) which enables the SBC temperature, voltage, and fan sensor output to be read. Temperature The temperature can be read from the two thermistors attached to the SBC. Sensor1 Sensor 2 Voltage...
  • Page 53 6. Software Utilities Speed Sensor If a fan fitted with a speed sensor is used, the fan speed sensor signal is input to pin 3 of CN9. This allows the user to read the fan speed. Note! If you wish to read the fan speed, you must use a fan with a speed sensor.
  • Page 54 6. Software Utilities Table 6.2. Hardware Monitor Index Register Description Address Automatic Update Address Read Vcore Read VTT Read +3.3V Read +5V Read +12V Read -12V Read -5V Read sensor temperature Read CN9 fan sensor Not used Not used 2Bh-3Dh 6Bh-7Dh Boundary register (*1) 3Eh-3Fh...
  • Page 55 6. Software Utilities Vcore read register (20h) VTT(V)= 16mV x read value VTT(1.5V) read register (21h) Vcore(V) = 16mV x read value +3.3V read register (22h) V3.3(V) = 16mV x read value +5V read register (23h) V5(V) = 16mV x read value x 1.68 +12V read register (24h) V+12(V) = 16mV x read value x 3.8 -12V read register (25h)
  • Page 56 6. Software Utilities CN9 fan sensor read register (28h) RPM=1.35 x 10 /(ReadData x fan_sensor_1_divisor) VID/Fan register (47h) VID0 VID1 VID2 VID3 an_sensor_1_divisor_B0 Fan_sensor_1_divisor_B1 Fan_sensor_2_divisor_B0 (Not used) Fan_sensor_2_divisor_B1 (Not used) Bit 7-6: Fan sensor 2 divisor bit 1-0 (Not used) Bit 5-4: Fan sensor 1 divisor bit 1-0 Bit 3-0: VID<3:0>...
  • Page 57 6. Software Utilities Processor pin 0 = Connected to Vss, Processor pin 0 = Connected to Vss, Vcore Vcore 1= Open or pulled-up to Vin 1= Open or pulled-up to Vin VID4 VID3 VID2 VID1 VID0 VID4 VID3 VID2 VID1 VID0 2.05 2.00...
  • Page 58 6. Software Utilities Chip ID register (Bank0:58h) Chip ID Bit 7-0: Winbond chip ID number Value returned on reading this register is "11h". Temperature sensor 2 temperature register 1 (Bank 1:50h) TEMP2 <8:1> Refer to the temperature format table for temperature sensor 2. Temperature sensor 2 temperature register (Bank 1:51h) Not used Not used...
  • Page 59 6. Software Utilities Table 6.6. Data Format Table for Temperature Sensor 2 Temperature TEMP<8:1> TEMP<0> +125°C +25°C +1°C -0.5°C +0°C -0.5°C -1°C -25°C -55°C PC-686BX(NLX)-LV, PC-686BX(NLX)-LVV...

  • Page 60: Bios Setup

    7. BIOS Setup 7. BIOS Setup This chapter describes the Award Setup program contained in the flash-ROM BIOS and how to use the program to configure the system. The Setup program is used to modify the system configuration. The configuration data is stored on battery-backed RAM which maintains the data even when the power is turned off.
  • Page 61 7. BIOS Setup Using the Setup Program In general, use the arrow keys to highlight the desired item, use the <Enter> key to select, use the <PageUp> and <PageDown> keys to change an entry, press the <F1> key to view help, and press the <Esc> key to exit. The table below lists in detail the keyboard operations used to navigate around the Setup program.
  • Page 62 7. BIOS Setup When a Fault Occurs The Award BIOS supports a feature to override the CMOS settings if you find that the computer is unable to boot after modifying and saving the system settings using the Setup program. This resets the system to the default settings. The best advice for users is to only modify those settings that they fully understand.

  • Page 63: Main Menu

    7. BIOS Setup Main Menu The main menu appears on the screen when you enter the Award BIOS CMOS setup utility. The main menu allows you to select a number of different setup functions and provides two options for exiting the program. Use the arrow keys to select an item and press the <Enter>...
  • Page 64 7. BIOS Setup LOAD BIOS DEFAULTS The BIOS default values are preset by the manufacturer. These defaults represent the minimum settings required for the system to operate. LOAD SETUP DEFAULTS The chipset default values are the settings for achieving maximum performance from the system.

  • Page 65: Standard Cmos Setup

    7. BIOS Setup Standard CMOS Setup The standard CMOS setup items are divided into ten categories. Each category contains zero, one, or many setup items. Use the arrow keys to highlight an item then press the <PgUp> or <PgDn> key to select the desired setting. PC-686BX(NLX)-LV, PC-686BX(NLX)-LVV...
  • Page 66 7. BIOS Setup Selection from Main Menu The following selections can be made from the main menu. Table 7.2. Main Menu Selections Item Options Description Sets the system date. The day of week changes Date mm : dd : yy automatically as you enter the date.
  • Page 67 7. BIOS Setup IDE Adapter The IDE adapter controls the hard disk drive. Use the separate sub-menus to configure each of the hard disk drives. Use the keyboard keys to move to the sub-menu then return to the main menu. The table below describes how to set the hard disk configuration.

  • Page 68: Bios Features Setup

    7. BIOS Setup BIOS Features Setup The BIOS features setup menu is used to configure the system for handling the basic operation of the computer. This menu can be used to set the default speed, boot sequence, keyboard operation, shadowing, and security options for the system. ROM PCI/ISA BIOS BIOS FEATURES SETUP AWARD SOFTWARE, INC.
  • Page 69 7. BIOS Setup CPU Internal/External Cache Two categories of high speed memory access are provided. However, the access methods depend on the CPU and chipset. Enabled Enable cache Disabled Disable cache CPU L2 Cache ECC Checking This setting enables or disables ECC checking of the CPU’s L2 cache. Selection options: Enabled, Disabled Quick Power On Self Test This setting allows a faster power-on self test (POST) to be performed when the...
  • Page 70 7. BIOS Setup Gate A20 Option Selects how to handle the gate A20. The gate A20 is a device used when addressing memory above 1MB. Previously, the gate A20 was manipulated by a pin on the keyboard. Keyboards still support this function today. Currently, however, standard practice is to support the gate A20 via the system chipset and this is the fastest method.
  • Page 71 7. BIOS Setup Security Option Selects whether to require password entry every time the computer is started or only when entering the Setup program. Do not boot the system and do not allow access to the setup program unless System the correct password is entered at the prompt.

  • Page 72: Chipset Features Setup

    7. BIOS Setup Chipset Features Setup ROM PCI/ISA BIOS CHIPSET FEATURES SETUP AWARD SOFTWARE, INC. Power-Supply Type : At Auto Configuration : Disabled Auto Detect DIMM/PCI Clk : Enabled EDO DRAM Speed Selection : 60ns Spread Spectrum : Disabled EDO CASx# MA Wait State CPU Host Clock (CPU/PCI) : Default EDO RASx# Wait State...
  • Page 73 7. BIOS Setup SDRAM CAS Latency Time The CAS latency time can be set to either 2/2 or 3/3 of HCLK. The system designer needs to set the value in this field based on the installed DRAM and CPU DRAM installation specifications.
  • Page 74 7. BIOS Setup 8Bit I/O Recovery Time The recovery time is the time measured in CPU clock cycles that the system waits after completing an I/O request. This delay is required because the CPU is operating at a much faster speed than the I/O bus and therefore needs to be delayed to allow the I/O to complete.
  • Page 75 7. BIOS Setup Auto Detect DIMM/PCI CLK Selects whether to automatically detect the DIMM and PCI clock. Selection options: Enabled, Disabled Spread Spectrum Used to enable or disable spread spectrum modulation. Selection options: Enabled, Disabled CPU Host Clock (CPU/CPI) Used to select the CPU’s host clock. This setting cannot be modified. CPU Warning Temperature Sets the warning temperature in the case when the computer has a monitoring system.

  • Page 76: Integrated Peripherals

    7. BIOS Setup Integrated Peripherals ROM PCI/ISA BIOS INTEGRATED PERIPHERALS AWARD SOFTWARE, INC. RxD , TxD Active : Hi,Hi IDE HDD Block Mode : Disabled IR Transmission delay : Disabled IDE Primary Master PIO : Auto Onboard Parallel Port : Disabled IDE Primary Slave PIO : Auto Parallel Port Mode...
  • Page 77 7. BIOS Setup IDE Primary/Secondary Master/Slave UDMA Ultra DMA/33 can only be used if supported by the IDE hard drive and the operating system includes a DMA driver (Windows 95 OSR2 or third party IDE bus master driver). If both the hard drive and system software support Ultra DMA/33, select "Auto"...
  • Page 78 7. BIOS Setup UART2 Duplex Mode Select the correct value for the IR device connected to the IR port. In half duplex mode, transmission can only be performed in one direction at a time. Selection options: Half, Full RxD, TxD Active This setting specifies whether to set RxD and TxD active.

  • Page 79: Power Management Setup

    7. BIOS Setup Power Management Setup The power management setup allows you to configure the system so that its operation is compatible with the way you intend to use the computer while at the same time achieving maximum power savings. ROM PCI/ISA BIOS POWER MANAGEMENT SETUP AWARD SOFTWARE, INC.
  • Page 80 7. BIOS Setup Performs maximum power management. Sleep mode = 1 hour, standby Max. Power Saving mode = 1 hour, suspend mode = 1 hour, HDD power off = 15 minutes Performs minimum power management. Only available on SL CPUs. Min.
  • Page 81 7. BIOS Setup Doze Mode Setting "Enabled" reduces the CPU clock speed if the system remains inactive for longer than a specified time. However, other devices continue to operate at full speed. Standby Mode Setting "Enabled" halts the fixed disk drive and video if the system remains inactive for longer than a specified time.
  • Page 82 7. BIOS Setup Soft-Off by PWR-BTTN Enabling this setting causes the system to operate with very low power consumption if the system power supply on/off button is turned off. In this state, the system only draws sufficient power to detect power supply button activity and "ring-initiated restart"...

  • Page 83: Pnp/Pci Configuration Setup

    7. BIOS Setup PnP/PCI Configuration Setup This section describes the setup for the PCI bus system. PCI is a peripheral device interface (PC interconnect) that enables I/O devices to operate at speeds close to the CPU execution speed for communication between the CPU and specific components. This section describes a number of technical settings.
  • Page 84 7. BIOS Setup Reset Configuration Data Normally, leave this field disabled. Only enable the field to reset the extended system configuration data (ESCD) in cases such as the when you wish to terminate the setup because the system has been reconfigured due to installing a new add-in component and this results in a major conflict that prevents the operating system from booting.
  • Page 85 7. BIOS Setup PCI IDE IRQ Map to This field is used to select the PCI IDE IRQ mapping or PC AT(ISA) interrupt. If the system does not require one or both of the PCI IDE connectors on the system board, select a value based on the type (PCI or ISA) of IDE interfaces (one or more) installed on the system.

  • Page 86: Defaults Menu

    7. BIOS Setup Defaults Menu Selecting "Defaults" from the main menu displays the following two options. Load BIOS Defaults Selecting this item and pressing the <Enter> key displays a confirmation dialog box with the following message. Load BIOS Defaults (Y/N) ? N Pressing the <Y>...
  • Page 87 7. BIOS Setup Password disabled If the password is enabled, the system prompts the user to enter a password each time the user enters the Setup utility. This prevents unauthorized users from making any changes to the system configuration. Also, if the password is enabled, the BIOS can also request the user to enter the password whenever the user reboots the system.

  • Page 88: Exit Options

    7. BIOS Setup Exit Options Save & Exit Setup Selecting this option and pressing the <Enter> key displays the following message. Save to CMOS and exit (Y/N)? Y Pressing "Y" saves the menu selections to CMOS (a special memory area which remains on even when the system power is turned off).

  • Page 89: Post Messages

    7. BIOS Setup POST Messages If the BIOS detects an error that requires remedial action during the power-on self test (POST), the BIOS sounds an alarm code or displays a message. If a message is displayed, the following text is also displayed. Press the F1 key to continue.

  • Page 90: Error Messages

    7. BIOS Setup Error Messages On detecting an error when executing the POST, the BIOS may display one or more messages. The following lists the messages for both the ISA and EISA BIOS. CMOS battery has failed The CMOS battery has failed and must be replaced. CMOS checksum error The CMOS checksum was incorrect.
  • Page 91 7. BIOS Setup EISA configuration checksum error [PLEASE RUN EISA CONFIGURATION UTILITY] The checksum on the EISA non-volatile RAM is incorrect or the EISA slot cannot be read correctly. This may indicate that the EISA non-volatile memory is corrupted or that the sot is not configured correctly.
  • Page 92 7. BIOS Setup Keyboard error or no keyboard present Unable to initialize keyboard. Check that the keyboard is connected correctly and that no keys are pressed when the computer boots. When intentionally configuring a system with no keyboard, set the Setup error handling setting to "HALT ON ALL, BUT KEYBOARD"...
  • Page 93 7. BIOS Setup Press a key to REBOOT This messages appears at the bottom of the screen if an error occurs that requires the computer to reboot. Press F1 to disable NMI, F2 to REBOOT If the BIOS detects a non-maskable interrupt (NMI) during booting, the user can select whether to disable the NMI and continue the boot sequence or reboot the system with the NMI still enabled.
  • Page 94 7. BIOS Setup sequence failed. Hold down the CTRL and ALT keys then press the DEL key. Board in slot is incorrect [PLEASE RUN EISA CONFIGURATION UTILITY] The board ID does not match the ID stored in the EISA non-volatile memory. Note! If this errors occurs, the system boots in ISA mode so that the EISA configuration utility can be run.
  • Page 95 7. BIOS Setup Hard disk(s) fail (80) Unable to reset HDD. Hard disk(s) fail (40) HDD controller test failed. Hard disk(s) fail (20) HDD initialization error Hard disk(s) fail (10) Unable to reconfigure fixed disk. Hard disk(s) fail (08) Sector verify failed. Keyboard is locked out –...

  • Page 96: Post Codes

    7. BIOS Setup POST Codes Table 7.4. POST Codes < 1 / 5 > POST (hex) Description Test CMOS R/W function. Initialize initial chipset: Disable shadow RAM. Disable L2 cache (Socket7 and above). Set base chipset register. Detect memory: Automatically detect DRAM size, type and ECC. Automatically detect L2 cache (Socket7 and above).
  • Page 97 7. BIOS Setup Table 7.4. POST Codes < 2 / 5 > POST (hex) Description Not used Not used Initial interrupt vector table. Unless otherwise specified, all hardware interrupts are assigned to SPURIOUS_INT_HDLR and all software interrupts are assigned to SPURIOUS_soft_HDLR. Not used Initial EARLY_PM_INIT switch Not used...
  • Page 98 7. BIOS Setup Table 7.4. POST Codes < 3 / 5 > POST (hex) Description Not used Not used Not used Not used Not used Not used Test 8254. Not used Test 8259 interrupt mask bit for channel 1. Not used Test 8259 interrupt mask bit for channel 2.
  • Page 99 7. BIOS Setup Table 7.4. POST Codes < 4 / 5 > POST (hex) Description Not used 1. Initialize Init_onboard_super_IO switch. 2. Initialize Init_onboard_audio switch. Not used Not used Permit entry to the CMOS Setup utility. In other words, the CMOS Setup utility cannot be entered until this point in the POST.
  • Page 100 7. BIOS Setup Table 7.4. POST Codes < 5 / 5 > POST (hex) Description 1. If a full-screen logo is supported, change to text mode. - If an error has occurred, display the error and wait for a key press. - If no error has occurred, pressing the F1 key continues execution.: * Erase the EPA logo or customer logo.
  • Page 101 7. BIOS Setup PC-686BX(NLX)-LV, PC-686BX(NLX)-LVV...

  • Page 102: Available Accessories

    8. Available Accessories 8. Available Accessories LCD connector converter board - ADPLNK(PC)H Dedicated SBC panel link I/F board (ISA bus) Optional cables - USB Connector Cable USB connector cable (shielded) - PC686C-566 Celeron 566MHz - PC686C-850 Celeron 850MHz - PC686-700 Pentium III 700MHz - PC686-850 Pentium III 850MHz...
  • Page 103 3-9-31, Himesato, Nishiyodogawa-ku, Osaka 555-0025, Japan Japanese http://www.contec.co.jp/ English http://www.contec.com/ Chinese http://www.contec.com.cn/ No part of this document may be copied or reproduced in any form by any means without prior written consent of CONTEC CO., LTD. [03102004] [06272001] Management No. A-46-481 [03102004_rev6] Parts No. LZQ2141...

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