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3.1.2
Meeting AC Timing Requirements for ASRAM
When configuring the EMIF to interface to ASRAM, you must consider the AC timing requirements of the
ASRAM as well as the AC timing requirements of the EMIF. These can be found in the data sheet for
each respective device. The read and write asynchronous cycles are programmed separately in the
asynchronous configuration register (ACFGn).
For a read access,
Parameter
Description
t
Data Setup time, data valid before EM_OE high
SU
t
Data Hold time, data valid after EM_OE high
H
Parameter
Description
t
Address Access time
ACC
t
Output data Hold time for address change
OH
t
Output Disable time from chip enable
COD
Parameter
Description
t
Read Cycle time
RC
Figure 12
shows an asynchronous read access and describes how the EMIF and ASRAM AC timing
requirements work together to define the values for R_SETUP, R_STROBE, and R_HOLD.
From
Figure
12, the following equations may be derived. t
R_SETUP, R_STROBE, and R_HOLD fields are programmed in terms of EMIF cycles where as the data
sheet specifications are typically given in nano seconds. This explains the presence of t
denominator of the following equations. A minus 1 is included in the equations because each field in
ACFGn is programmed in terms of EMIF clock cycles, minus 1 cycle. For example, R_SETUP is equal to
R_SETUP width in EMIF clock cycles minus 1 cycle.
The EMIF offers an additional parameter, TA, that defines the turnaround time between read and write
cycles. This parameter protects against the situation when the output turn-off time of the memory is longer
than the time it takes to start the next write cycle. If this is the case, the EMIF will drive data at the same
time as the memory, causing contention on the bus. By examining
derived as:
SPRUEQ7C – February 2010
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Table 15
to
Table 17
list the AC timing specifications that must be considered.
Table 15. EMIF Input Timing Requirements
Table 16. ASRAM Output Timing Characteristics
Table 17. ASRAM Input Timing Requirement for a Read
R_SETUP ) R_STROBE w
R_SETUP ) R_STROBE ) R_HOLD w
R_HOLD w
TA w
Copyright © 2010, Texas Instruments Incorporated
is the period at which the EMIF operates. The
cyc
t
(m) ) t
ACC
SU
* 1
t
cyc
t
(m)
RC
* 3
t
cyc
t
* t
(m)
H
OH
* 1
t
cyc
Figure
t
(m)
COD
* 1
t
cyc
Asynchronous External Memory Interface (EMIF)
Use Cases
in the
cyc
12, the equation for TA can be
31
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