SOYO SY-5EH5 User's Manual & Technical Reference page 53

BIOS Setup Utility
CHIPSET FEATURES SETUP
CHIPSET
FEATURES
Bank 0/1 DRAM
Timing
Bank 2/3 DRAM
Timing
Bank 4/5 DRAM
Timing
DRAM Read
Pipeline
Cache Rd+CPU
Wt Pipeline
Linear Burst
Video BIOS
Cacheable
System BIOS
Cacheable
Memory Hole
15Mb Addr.
Setting Description
FP/EDO Use the default setting
70ns
Normal Choose DRAM Timing.
Medium
Fast,
Turbo
Disabled
Enabled Enhances system
performance
Disabled
Enabled Enhances system
performance
Disabled Use the default setting
Enabled Linear mode SRAM support
for Cyrix type of CPU.
Disabled
Enabled The ROM area A0000-
BFFFF is cacheable.
Disabled
Enabled The ROM area F0000H-
FFFFFH is cacheable
Disabled Some interface cards will
map their ROM address to
this area.
Enabled
48
SY-5EHM/5EH5 V1.3
Note
Default
Default
Default
Default
Default
Default
Default