Sony UP-D2600S Service Manual page 114

DREQ
DCK
D[7:0]
Input and output timing from IF-787 and IF-788 boards to PQC IC
Item
DCK cycle time
Data setup time
Data hold time
DREQ LOW TO HIGH
nHEAD_ACTIVE
PRINT_PULSE
tRTA
nPRINT_DREQ
nPRINT_DACT
PRINT_D [7:0]
PRINT_DCK
Item
nHA ↓ to PP ↑
PP ↑ to nHA ↑
nDREQ ↓ to nDACK ↓
nDACK ↓ to DCK input
Data setup time
Data hold time
DCK high level width
DCK low level width
DCK ↑ to nDACK ↑
4-20
tFDCKCYC
tFDS tFDH
Code address MIN
tFDCKCYC 400
tFDS 15
tFDH 15
tFDRQH 20
tREM TI
magnification
tSDC
tDS tDH
Input and output timing from PQC IC to HDC IC
Code address MIN
t REM 10
t LHH 5.48
t RTA 10
t SDC 0
t DS 10
t DH 10
t PWH 200
t PWL 200
t LHA 1.8
tFDRQH
MAX Unit
— ns
— ns
— ns
45 ns
tPWH tPWL
MAX Unit
— ns
— ns
— ns
— ns
— ns
— ns
— ns
— ns
µs
—
tLHH
tLHA
UP-D2600/V1(E)