Sony MDS-NT1 Service Manual page 52

MDS-NT1
BD BOARD IC201 CXD2664R
(DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO SIGNAL PROCESSOR, EFM/ACIRC ENCODER/DECODER,
SHOCK PROOF MEMORY CONTROLLER, ATRAC ENCODER/DECODER)
Pin No. Pin Name
1 MNT0 (FOK)
2 MNT1 (SHCK)
3 MNT2 (XBUSY)
4 MNT3 (SLOC)
5 VDC0
6 SWDT
7 SCLK
8 XLAT
9 VSC0
10 SRDT
11 SENS
12 XRST
13
SQSY
14 DQSY
15 RPWR
16 XINT
17 TX
18 VDIO0
19 OSCI
20 OSCO
21 OSCN
22 VSIO0
23 XTSL
24 DIN0
25 DIN1
26
DOUT
27
DATAI
28
LRCKI
29 XBCKI
30 VDC1
31 VSC1
32
ADDT
33 DADT
34
LRCK
35
XBCK
36 FS256
37 XWE
38 XOE
39 DRVDD0
40 DRVSS0
52
I/O
O Focus OK signal output terminal "H" is output when focus is on ("L": NG) Not used
O
Track jump detection signal output to the system controller
O
Busy monitor signal output to the system controller
O
Spindle servo lock status monitor signal output terminal Not used
— Power supply terminal (+2.5V) (for core)
I
Writing serial data signal input from the system controller
I
Serial data transfer clock signal input from the system controller
I
Serial data latch pulse signal input from the system controller
— Ground terminal (for core)
O
Reading serial data signal output to the system controller
O
Internal status (SENSE) output to the system controller
I Reset signal input from the system controller "L": reset
Subcode Q sync (SCOR) output to the system controller
O
"L" is output every 13.3 msec
Digital In U-bit CD format subcode Q sync (SCOR) output to the system controller
O
"L" is output every 13.3 msec
Laser power selection signal input from the system controller
I
"L": playback mode, "H": recording mode
O Interrupt status output to the system controller
O
Magnetic head on/off signal output to the over write head drive
— Power supply terminal (+3.3V) (for I/O)
I System clock signal input terminal Not used
I System clock signal (2048Fs=90.3168 MHz) input terminal
Control terminal for inverter and feedback resistor of internal oscillator circuit
I "L": OSCO (pin w;) is output terminal, "H": OSCO (pin w;) is input terminal
(fixed at "H" in this set)
— Ground terminal (for I/O)
Input terminal for the system clock frequency setting
I
"L": 180.6336 MHz, "H": 90.3168 MHz (fixed at "H" in this set)
I
Digital audio signal input terminal when recording mode Not used
I Digital audio signal input terminal when recording mode
O Digital audio signal output terminal when playback mode Not used
I Recording data input from the USB interface
I L/R sampling clock signal (44.1 kHz) input from the USB interface
I Bit clock signal (2.8224 MHz) input from the USB interface
— Power supply terminal (+2.5V) (for core)
— Ground terminal (for core)
I Recording data input terminal Not used
O Playback data output to the D/A converter
O L/R sampling clock signal (44.1 kHz) output to the D/A converter
O Bit clock signal (2.8224 MHz) output to the D/A converter
O
Clock signal (11.2896 MHz) output to the D/A converter
O Write enable signal output to the D-RAM "L" active
O Output enable signal output to the D-RAM "L" active
— Power supply terminal (+3.3V) (for D-RAM interface)
— Ground terminal (for D-RAM interface)
Description
Almost all, "H" is output
Almost all, "H" is output