IBM System/370 145 Manual page 85

Instruction Nullification
When a page fault occurS in a demand paging environment, execution of
the instruction that caused the page fault stops and the control program
gains control to initiate a page-in operation. When the contents of the
missing page have been loaded (and the appropriate page table entry has
been updated), the instruction ·that caused the page fault is reissued.
In order for the instruction to operate correctly the second time,
execution of the instruction must have been stopped such that
reexecution gives the same resu.lts as would occur if the instruction had
been executed only once. There.fore, the contents of real storage, the
general and floating-point re.gi:sters, and the PSW must not be altered.
The execution of an instruction is said to be nullified when it is
stopped such that no operation :is performed, no fields are changed, and
the PSW indicates the address o:f the instruction that -was stopped.
Interruptible instructions. such as MOVE LONG, are divided into
execution units. One or more e:lCecution units may have completed before
a page fault is detected. In this case, only the current execution unit
is nullified.
Various methods are used, depending on the type of instruction, to
determine the need for nullification. In some cases, execution of the
instruction is attempted where hardware detection of page faults permits
nullification. In other cases, pretesting is required·to determine
whether the virtual storage
pag.~s
to
be
referenced have page frames
allocated. Nullification testil1g is required only for instructions
whose translated addresses .refel:-ence real storage. Testing is
accomplished in the Model 145 b)r additional microcode routines that are
executed prior to normal instruc::tion exe'cution microcode,.
Instructions that do not need pretesting are those whose operation is
such that when the operands the)r reference are on integral storage
boundaries that are a multiple of· the implied operand length, only one
page can be involved. For example, a store fullword (STORE) instruction
that addresses a four-byte data field aligned on a fullword boundary
cannot cross a page boundary during execution. The aligned data will
always
be
totally contained. in one page. This instruction is allowed to
execute without pretesting as soon as it has been determined that the
addressed data field is on an integral boundary.
Similarly, if a store
fullwo.l~d
instruction addresses a four-byte
field that is not on a fullword boundary, a.pretest is required to
determine whether all the four bytes are contained in real storage. The
pretest microcode for this instI:uction issues a fetch to the highest
addressed byte in the four-byte data field (virtual storage address in
the instruction plus three). The absence of a page translation
exception during translation of the virtual storage address indicates
that
(1)
if the data field spans: two pages, at least the second of the
two pages is present in real storage or (2) the data field is totally
contained in one page that is pJ:~esent in real storage. Hence, the
instruction is allowed to procee!d without nullification. If the data
field actually cl,oes span two pa9res and the first page is not in real
storage, this fact will
be
indic:ated by a page fault during translation
of the address of the
high-ord~'
byte of the field. Instruction
nullification will occur and
the~
page fault will cause a page-in of the
first page to
be
initiated by the control program as usual.
If the pretest fetch operation does cause a translation exception,
the store fullword instruction i.s nullified and the control program
gains CPU control to load the mi.ssing page. Once again, the page-in
caused by the pretest 'may have brought in the second of two pages
spanned by the data field or the! only page containing the data field.
After the page-in, the instructi.on is reexecuted.
A Guide to the IBM System/370 Model
145 75