Startup Procedure - Motorola Symbol SE4400 Integration Manual

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Note: Clock details apply for the I
Register
WK3 Sanyo DSP Specification, Version 1.
The operating settings, stored in the SE4400's on-board DSP registers, are programmed
2
using the I
C interface developed by Philips. For information, refer to The I
Specification, Version 2.1,
http://www.semiconductors.philips.com/acrobat/literature/9398/39340011.pdf.
The SE4400 can run in various modes; two are described in this chapter. For information
concerning other modes and more information concerning the CCD and DSP, refer to
LC99704B-WK3 Sanyo DSP Specification, Version 1 and LC99214 Sanyo B&W CCD
Sensor Specification, Version 2.
Mode 1 only uses the MCKI clock and the I
image acquisition is largely automated. An auto-exposure/gain setting can be used
to provide full automation, where real-time I
disadvantage to Mode 1 is that the CCD's internal charge-pump takes 15 frame
times (approximately 566 ms) to charge to full capacity, only after which images
appear with full brightness.
Use Mode 3 to overcome this start-up delay in time-critical applications. With this
mode, a speedy start-up of about 156 ms occurs in place of automation. Mode 3
requires two additional timing signals, EXSFT and EXHT. These signals provide
more control of the exposure time (and therefore a quicker response time to
changing illumination conditions), which can yield a higher frame rate.
Mode 3

Startup Procedure

See
Figure 5-2
for the Mode 3 startup procedure timing diagram.
summary of the Mode 3 input and output signal functions.
To reset the DSP's I
500 µs. To ensure a valid reset on power-up, the t (time to rise to 63% of 3.3V) of the Vcc
supply voltage (J1-8 and J1-9) must be less than 1.12 ms. If the Vcc rise time is between
the slowest allowable and quickest possible, the reset will complete between 1.39 ms and
2.41 ms after power is supplied. A typical supply results in a reset delay of about 2 ms. If
Settings. For alternate clock scenarios, refer to LC99704B-
2
C registers, the REG_RES* line must be held low for a minimum of
2
C settings provided in
2
C programming lines as inputs, so
2
C programming is unnecessary. The
Application Notes
Appendix A,
2
C-Bus
Table 5-1
provides a
5-3

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