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93,94,95,
SA4~9
96,97,98
92
CMD
91
IO16
100
INT
56,53,52,
SD16~31 (in
51,50,49,
double word
47,46,45,
mode)
44,43,41,
40,39,38
37
57
IO32 (in double
word mode)
EEPROM Interface
64
EEDI
65
EEDO
66
EECK
67
EECS
Clock Interface
21
X2_25M
22
X1_25M
I
address bus 4~9 for ISA mode
I
Command type:
When high, the access of this command cycle is DATA port.
When low, the access of this command cycle is ADDRESS port.
O
word command indication
When the access of internal memory is word or dword width, this pin will
be asserted.
This pin is low active at default, its polarity can be modified by EEPROM
setting. See the EEPROM content description for detail.
O
interrupt request
This pin is high active at default, its polarity can be modified by EEPROM
setting or strap pin MDC. See the EEPROM content description for detail.
I/O
Processor data bus bit 16~31
These pins are used as data bus bits 16~31 when the DM9000 is set to
double word mode (the straps pin EEDO is pull-high and WAKEUP is not
pull-high).
O
Double word command indication
This pins is used as the Double word command indication when the
DM9000 is set to double data word mode and when the access of internal
memory is double word width, this pin will be asserted.
This pin is low active at default, its polarity can be modified by EEPROM
setting. See the EEPROM content description for detail.
I
Data from EEPROM
I/O
Data to EEPROM
This pin is also as a strap pin. Combine with strap pin WOL, it can set the
data width of the internal memory access.
The decoder table is the following, where the logic 1 means the strap pin
is pull-high.
WAKEUP EEDO
0
0
0
1
1
0
1
1
O
Clock to EEPROM
I/O
Chip Select to EEPROM
This pin is also used as a strap pin to define the LED modes.
When it is pull-high, the LED mode is the mode 1;
Otherwise it is mode 0.
O
Crystal 25MHz Out
I
Crystal 25MHz In
17
data width
word
double word
byte
reserved
DN-V750/V755
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