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SDM-2020 Satellite Demodulator
A.6.5.5
Buffer Centering
The unit provides buffer centering capability. The buffer can be set to 50% by the
operator via the front panel. Buffer centering also occurs automatically after each of the
following: receive signal acquisition, change in buffer size, change in buffer reference,
and an overflow/underflow condition. During overflow or underflow conditions a Demod
alarm is indicated. A buffer full condition is reported when the buffer exceeds 90% full,
or when the buffer falls below 10%.
A.6.5.6
General Receive Specifications
Refer to Table A-32 for general RX specifications.
RX 2047 Pattern
Generation
AIS/Data Fault Detection
RX AIS Assertion
RX Output Stable
Buffer Reference Clock
Activity
RX Buffer PLL Fault
Detection
FPGA Program Error
Detection/Reporting
Rev.3
Table A-32. General RX Specification
The unit supplies a 2047 test pattern substitution into the RX data path and
perform BER calculations on that pattern, with the results reported to the host
unit.
The unit provides AIS (all 1's) or data fault (all 1's or 0's) detection on the
incoming RX data stream.
The unit provides AIS substitution into the RX data path when commanded by
the host unit.
The unit provides data stable (all 1s) into the RX data path when installed in a
unit RX data stable shall be removed when either interface loopback or interface
loop-through is turned on.
The unit provides activity detection for RX Satellite Clock, TX Terrestrial, and
External Clock sources. An alarm condition is communicated to the host unit
when lack of activity is detected.
The unit provides RX Buffer PLL fault detection. When the RX buffer PLL is
not locked a fault condition is communicated to the host unit.
The unit detects TX and RX FPGA programming errors and reports errors to the
host unit.
Data Interfaces
A–51
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