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End-Of-Service Determination
The CHARGE-BEFORE-DISCHARGE approach described above in (a) is appealing in that the battery
voltage is not discharged below the appropriate charging voltage level by the learning phase. However, it
requires the use of a charger with programmable charging voltage, which may be a limitation in some
systems. For those cases, the DISCHARGE-BEFORE-CHARGE approach in (b) is provided, whereby a
charger with a fixed output voltage can be used with the tradeoff that the battery voltage will be
discharged below this level during the Learn Discharge Phase. However, the amount of this reduction in
battery voltage, and thus capacity, can be controlled and limited to acceptable levels through appropriate
device settings.
The response of the battery to the learning discharge current is analyzed and used to estimate the cell
resistance, Rcell, and this resistance estimate is used in two different methods to evaluate the cell EOS
status:
a. Direct Resistance Decisioning (DRD): This method uses the newly measured value of Rcell and
computes the ratio of Rcell with that of an Initial Rcell captured when the battery was first put into
service. The ratios are compared to thresholds to generate an alert and a warning.
•
Alert if (Rcell/Initial Rcell) > DRD Alert Level
•
Warning if (Rcell/Initial Rcell) > DRD Warning Level
b. Resistance Slope Decisioning: This method uses the changes with respect to time of Rcell,
comparing this to programmable thresholds to generate an alert and a warning.
Use of Resistance Slope Decisioning (RSD) requires an accurate measurement of the time between
consecutive learning phases for calculation of the slope of Rcell change with respect to time. This will not
be possible if the device is powered off between learning phases; in which case, Direct Resistance
Decisioning (DRD) can still be used. If the device is programmed to use Resistance Slope Decisioning
and a power cycle is detected (or anything that could impact the validity of the time measurement between
learning phases), then the device defaults to only using Direct Resistance Decisioning until the device is
continuously powered long enough to complete multiple learning phases and accurately evaluate the
Rcell change over time.
1.3.1 Alert Config Registers
The Alert registers are detailed in this section.
Alert_x Config Register
1.3.1.1
Alert_0 Config
This register matches the Battery Status register low byte.
Bit 7
SLEEP
0
Default
16
General Description
Table 1-3. Alert Config Registers
Alert_0 Config
Alert_1 Config
Alert_2 Config
Alert_3 Config
Alert_4 Config
Alert_5 Config
Alert_6 Config
Table 1-4. Alert_0 Config Register Bit Definitions
Bit 6
Bit 5
CHGINH
FD
0
0
Copyright © 2018, Texas Instruments Incorporated
Matching Register
Battery Status Low Byte
Battery Status High Byte
EOS Learn Status Low Byte
EOS Learn Status High Byte
EOS Safety Status Active Bits
Operation Status 2 bits
Bit 4
Bit 3
FCSETV
TCA
0
0
0x00
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EOS Status
Bit 2
Bit 1
Bit 0
TDA
CHG
DSG
0
0
SLUUBE8 – September 2018
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