Transmitter Power Amplifier (Pa) 15 W; Power Controlled Stage - Motorola CDM1550 LS+ Detailed Service Manual

2-26
Theory of Operation
The IFIC is a low-voltage monolithic FM IF system incorporating a mixer/oscillator, two limiting IF
amplifiers, quadrature detector, logarithmic received signal strength indicator (RSSI), voltage
regulator and audio and RSSI op amps. The second LO frequency is determined by Y3101.
Additional IF selectivity is provided by two ceramic filters, FL3111 (between the second mixer and IF
amp) and FL3113 (between the IF amp and the limiter input). FL3111 is a 6 element filter with a
BW6 =9kHz. FL3113 is a 4 element filter with a BW6 = 12kHz. These bandwidths are optimum for
12.5 kHz channel spacing systems. Ceramic resonator Y31 02 provides phase vs. frequency
characteristic required by the quadrature detector, with 90 degree phase shift occurring at 455 kHz.
Buffer 03141 provides a lower driving impedance from the limiter to the resonator, improving the IF
waveform and lowering distortion.
2.8 Transmitter Power Amplifier (PA) 15 W
The radio's 15W power amplifier (PA) is a three stage amplifier used to amplify the output from the
VCOBIC to the radio transmit level. It consists of the following three stages in the line-up. The first
stage is a LDMOS predriver (U3401) that is controlled by pin 4 of PCIC (U3501) via U3503
(CNTLVLTG). It is followed by another LDMOS stage (03420) and an LDMOS final stage (03440).
From VCO
Vcon trol
To Microprocessor
Harmonic
Filter
~~~
......_....--_.
ASFIC
Bias 1
PA
PWR
SET
Antenna
L....--~To
Microprocessor
Figure 2-12. 700 MHz Transmitter Block Diagram
2.8.1 Power Controlled Stage
The first stage (U3401) is an integrated circuit containing two LDMOS FET amplifier stages having a
combined gain of 11 dB. It amplifies the RF signal from the VCO (TXINJ) . The output power of stage
U3401 is controlled by a DC voltage applied to pin 1 from opamp U3503-1 pin 1. The control voltage
simultaneously varies the bias of two FET stages within U3401. This biasing point determines the
overall gain of U3401 and therefore its output drive level to 03420 , which in turn controls the output
power of the PA.
Opamp U3503-1 monitors the drain current of U3401 via resistor R3513 and adjusts the bias
voltage of U3401 so that the current remains constant. The PCIC (U3501) provides a DC output
voltage at pin 4 (I NT) which sets the reference voltage of the current control loop. An increasing
power output causes the DC voltage from the PCIC to fall, and U3503-1 adjusts the bias voltage for
a lower drain current to reduce the gain of the stage.