Motorola CDM1550 LS+ Detailed Service Manual page 43

Theory of Operation
2-29
7 LOCK
4 ..
A (U0101 PIN 100) OAT
CLO
. .
DATA
-
LOCK (U0101 PIN 56)
8 FREFOUT
19 ..
FREF (U0221 PIN 34)
CK (U0101 PIN 1)
CLK
...
GND
6,
2~.
33,44
9
CSX (U0101 PIN 2)
CEX
..
~
-
STEERING
10
I
2-POLE f E
IN (U0221 PIN 40)
. .
MODIN
lOUT
43 ..
13,30
MOD
+5V
+5V
IADAPT
45 -
I
LOOP
(U3202 PIN 1) "'
VCC,DC5V
-
I
FILTER
(U3202 PIN 1)
5
•
2
"'-
34
•
36
VDD, DC5V
MODOUT
41
- 23
AUX4
3
(NU)
I
LO RF INJEC
I
REFERENCE
I
XTAL1
U3201
1 (NU)
..
LOW VOLTAGE
AUX2 I
..
OSCILLATOR
2 ..
TRB
FRACTIONAL-N
AUX3
VOLTAGE
I
... 25
WARP
SYNTHESIZER
28
~IL
TERED 5V CONTROLLED
-
SFOUT
32
PRE IN
...
OSCILLATOR
-
BIAS1
~
. .
47
VCP
I
..
j
-
VMULT2 VMULT1
AUX1BIAS2
~
TX RF INJECTIO
I
VOLTAGE
I
39
(1ST STAGE OF
MULTIPLIER
...
141
151
48
-
(NU)
I
..
PRESCALER IN
Figure 2-13. 700 MHz Synthesizer Block Diagram
TION
N
PA)
Output LOCK (U3201-4) provides information about the lock status of the synthesizer loop. A high
level at this output indicates a stable loop. IC U3201 provides the 16.8 MHz reference frequency at
pin 19. ·
The serial interface (SRL) is connected to the IJP via the data line DATA (U3201-7), clock line CLK
(U3201-8), and chip enable line CSX (U3201-9).
2.9.3 Voltage Controlled Oscillator (VCO)
The Voltage Controlled Oscillator (VCO) consists of the VCO buffer IC (VCOBIC, U3301), the TX
and RX tank circuits, the external RX buffer stages, and the modulation circuits.
The VCOBIC together with Fractionai-N synthesizer (U3201) generates the required frequencies in
both transmit and receive modes. The TRB line (U3301 pin 19) determines which tank circuits and
internal buffers are to be enabled. A high level on TRB enables TX tank and TX output (pin 1 0), and
a low enables RX tank and RX output (pin 8). A sample of the signal from the enabled output is
routed from U3301 pin 12 (PRESC_OUT), via a low pass filter, to pin 32 of U3201 (PREIN).