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D. Other circuits
(a) Reset circuit
The reset signal generates the CPU reset signal, and is composed of the IC5 and the peripheral circuits. The IC5 has the integrated reset functions
of the power ON reset, the CPU reset in case of abnormally low voltage of +5V, and the watch-dog timer function.
When the power is supplied and the power line (+5V) reaches about 0.8V, the IC5 start operation. The IC5-8 pin becomes LOW to rest the CPU.
When the power line reaches about 4.3V, the reset state is retained for the time (about 100ms) determined by the capacity of C13. After passing the
retaining time, the IC5-8 pin becomes HIGH to cancel the reset, and the CPU start operation.
When the power line falls to about 4.2V, the IC5-8 pin becomes LOW similarly to reset the CPU. This state is canceled after 100ms from the
moment when the power line reaches 4.3V.
The IC5-3 pin is the watch-dog timer clock input pin, and receives the regular pulse signals of 10ms frequency outputted when the CPU is normally
operating. If this signal is stopped because of hung up of the CPU, etc., the IC5-8 pin is driven LOW in a certain time to reset the CPU. The clock
monitoring time is also determined by the C13 capacity (about 100ms).
Hard reset is also available from the PPC body through the communication cable. In this case, CN3.6 pin is driven HIGH or opened to reset. The
IC9.1, 2 are for logical sum. The IC13.3 is the open collector element to compose the IC5 reset output and the hard reset.
I/F cable
CN3-6
D-RES
RESET
+5V
R35
10K
6
1
2
C3
IC9-1
0.022µF
GROUND
P62
7
25
+5V
R73
10K
3
4
5
6
C14
IC9-2
IC13-3
1000pF
GROUND
Reset circuit
11 – 7
+5V
D3
R71
2
10K
RES
3
CK
VCC
8
IC5
*RES
MB3773
1
CT
GND
6
VREF
VS
7
C12
C13
1000pF
1µF
+5V
5
C28
0.1µF
4
GROUND
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