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F. Open/close switch (F/LSW) input circuit
This circuit is composed of the microswitch which detects open/close of the paper tray 3 and the mechanism to press the switch. When the tray is
closed, the switch is turned on. When the tray is opened, the switch is turned off. When the switch is turned on, +24V is applied to the cathode of
ZD2 to supply current to the base of Q9, turning on Q9 and driving F/LSW signal LOW (0V).
CN-1
CN-2
F/LSW
G. Paper tray 2 sensor, switch input circuit
(UCSS1 ∼ 4, LUD1, PED2, PFNUD) and input port expansion IC (IC11)
The paper size select switches (UCSS1 ∼ 4) detect the size of paper in the paper tray 2. The paper surface sensor (LUD1) is the photo interrupter
which forms the signal to control the hopper motor which lifts paper to the feeding level. The sensor (PED2) is the photo interrupter which detects
presence of paper. They are composed of the lever and the photo interrupter. These sensors and switches are positioned in the paper tray 2. The
pull-up resistor is used to determine the signal logic, and the resistor connected in series is for protection of the IC11.
These signals (excluding PFNUD) and the side sensor (SIDE) and the desk open/close sensor (F/LSW) are taken into the IC11 input port. The IC11
converts parallel input signals into serial signals and outputs them in synchronization with CLK. The CPU P32 outputs CLK to the IC11 CLK input
pin.
The IC11 latches the parallel input signal at falling of the S/L pin and outputs signals of sensors from the 0h pin in synchronization with CLK. The
serial signal is taken into the CPU input pin and used as a sensor signal in the CPU.
(2) Drive system control circuit
A. Paper transport motor speed control circuit (HMOT)
This circuit controls the DC brushless motor which transports paper, and is composed of the pulse generating circuit which allows the CPU to
recognize the motor speed and the motor drive circuit which drives the motor by the PWM output according to the pulse (PLS). The motor is
composed of the PWB and the rotor. The PWB is provided with the pulse (PLS) generating circuit and the drive circuit. The PWM output is supplied
from the CPU. The interface between the CPU PWB and the motor PWB is performed with the powers (24V, 5V), GND, the PLS signal, and the
PWM signal.
IC3
TC74HC08AF
Q11
R22
BA1L4Z
12
10K
11
13
CN1
DB1B-5P-
3
2.5DSA
IC3
24V 5
6
GND 4
IC3
PLS 3
8
5V 2
IC3
FG 1
C1
Q9
4.7µF
2SC2712
5.1K
x 3
R17
R19
R21
c
CN6-5
DC24V
DC24V
CN6-4
F/L_I/L
F/L_I/L
Interface PWB
b
R24
IC1
4.7K
AN8261
1 VCC
HA+ 18
2 FG
HA- 17
3 FG2
HB+ 16
1
4 GND
HB- 15
5 TSD
HC+ 14
2
6 Vref
HC- 13
7 UH
UL 12
5
8 VH
YL 11
9 WH
WL 10
4
9
10
R4
R5
R6
2.7K
2.7K
2.7K
R1 5.1K
Q8
Q7
Q4
R2
R3
2SCJ175
Q5
5.1K
5.1K
Q1
2SC2712
Q2
R20
R18
R16
300
300
300
CN1-1
CN1-1
DC24V
CN2-4
CN2-4
F/L_I/L
Control PWB
F/LSW input circuit
a
H3
H2
1SR139-100
D6
D5
D4
(U)
Q6
(V)
Q3
D1
D3
D2
RB100A
d
Motor drive circuit
11 – 4
DC2 4V
1
ZD2
12V
4
GROUND
R8
470
HW-300B
C3
220pF
R7
H1
470
R13
R12 510K
C4
1K
6
FG
C6
2/2
1µF
0.01µF
5
C5
IC2
R25
0.1µF
µPC358
30K
C2 22µF
R15
R10
10K
39K
R14
R9
(W)
5.1K
10K
Q10
2SC2712
R23
10K
+5V
IC11
R47
10K
1 4
PI
Q9
e
2
7
1/2
1
3
R11
10K
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