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<Timing chart>
ΦROG
Φ1-ODD
Φ1-EVEN
ΦLH-EVEN
ΦLH-ODD
Φ2-ODD
Φ2-EVEN
ΦRS-ODD
ΦRS-EVEN
VOUT-ODD
VOUT-EVEN
[Image data reading]
The ILX510 has 5150 effective pixels.
In the CCD control section, the FIFO of 5048 pixels is provided for
image data output and shading correction data, and 102 pixels out of
it must be discarded.
Therefore, S49 ∼ S5095 out of S1 ∼ S5150 are enabled to output.
[Shading correction]
Corrections of light/dark areas are performed by changing the upper
side and the lower side of the A/D reference voltage.
Setting of the reference voltage is performed by the D/C convertor
built in 2Ch.
Since the light area correction is made for each pixel, the 8-bit correc-
tion data written into the FIFO are D/A converted to change the
voltage at REF+ pin of the A/D convertor.
Two A/D convertors and two D/A convertors are provided for odd
number pixels and even number pixels respectively, and they are
operated at 8MHz.
Since there is only one FIFO, reading is made at 16MHz.
/HSC,/COPY,/BLCK,SWCK
BDB,SMODE,WB,WRCK
SHINHB
ROGB*,STTB
CLMP
DACK0
ADRSTB
CCDCK
VRST
DACKE
SHINH
ADRST
CS51
SHD[0..7]
/WE /RSTW D1[0..7] /RE,/RSTR
Light area
correction FIFO
CK
CCD PWB
Vaven
Odd number channel analog process circuit
Vodo
D1
D3
D5
D2
D4
D6
Dummy signal (74 pixels)
CCD GA
SRREB,SRRESB
SRCK,SWCK
BWCK0,BWCKE
D1[0..7]
CLK
CK
RCK,WCK
Odd number dark area
correction latch
D0[0..7]
D0[0..7]
A
B
Aout
Odd number D/A
LH50511
Bout
D23 D25 D27
D69 D71 D73
S1
D24 D26 D28
D70 D72
D74
S2
1 line output period (5244 pixels)
The dark area is divided into the odd number pixels and the even
number pixels to change the voltage at REF- pin of the A/D convertor.
Two 8-bit latches (74AC273) are provided for the odd numbers and
the even numbers. The value is D/A converted to set the voltage at
REF- pin.
The output of the D/A convertor is a current output, which is con-
verted into a voltage by the resistor and the transistor to input to the
REF pin of the A/D convertor. The voltage supplied to the REF pin is
slightly off-set by the ON voltage of the transistor even though the
read value of the A/D convertor is directly set to the D/A convertor.
Therefore correction must be performed from the read value in the
shading correction.
IN the case of data reading for shading correction, the SHINH signal
is driven LOW in order to maximize the light area and minimize the
dark area.
By driving the SINH signal LOW, the dark area FIFO output is HIGH-
Z, and the dark area latch is cleared.
Since the FIFO output is pulled up, FFh and 00h are provided to the
D/A convertor.
ADCK
8MCK
RREB
RRESB
CK
PXCK
REF+
FWCK
REF-
BD[0..7]
ABD[0..7]
D[0..7]
AD[0..7]
Odd number
A/D
LH5050G
Vin
9 – 4
D77 D79 D81
S3
S5145
S5149
D75
S5147
D76 D78 D80
S4
S5146
S5150
S5148
Dummy signal (20 pixels)
AREAC
/WE
Image data
R OG *
/RSTW
FIFO
WCK
DIN[0..7]
SH
D93
D83
D84
D94
D82
/RE
/RSTR
RCK
DIN[0..7]
To ICU
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