Hardware - Xerox Alto I Hardware Manual

A personal computer system alto series
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Alto Hardware Manual
Ether Boot:
3.4 Hardware
Section 3: Emulator
30
The single disk sector at the given address is read: the 256 data words are read
into locations 1 to 400B inclusive; the label is read into locations 402B to 411B
inclusive. When the transfer is complete, pc+-1, and the emulator is started.
The disk status is stored in location 2, so the bootstrapping code must skip this
location.
If the <BS) key is depressed, the microcode anticipates breathing life into the
Alto via the Ethernet. The Ethernet hardware is set up to read any packet with
destination Alto number 377B' into locations 1 to 400B inclusive.
If a packet
arrives with good status and with memory location 2 (Le., the second word of the
packet) equal to 602B (a "Breath-of-Life" packet), pc+-3, and the emulator is
started.
More information regarding boot loaders and boot file formats is found with
Buildboot documentation in the Alto Subsystems Manual.
There is a small amount of special hardware which is used exclusively by the emulator. This hardware is
controlled by the task specific F2's, and by the
~
DISP bus source.
The IR register is used to hold the current instruction. It is loaded with
IR~
(F2=14B).
IR~
also merges
bus bits 0,5,6 and 7 into NEXT[6-9], which does a first level instruction dispatch.
The high order bits of IR cannot be read directly, but the displacement field of IR (8 low order bits), may
be read with the .. DISP bus source.
If the
x
field of the instruction is zero (Le., it specifies page 0
addressing) then the DISP field of the instruction is put on Bus[8-15] and BUS[O-7] is zeroed. If the
x
field of the instruction is nonzero (Le. it specifies pC-relative or base-register addressing) then the DISP
field is sign-extended and put on the bus.
Bus[8-15]~
IR[8-15]
Bus[0-7] +- if IR[ 6-7] = 0 then 0 elseif IR[8] = 0 then 0 else-1
There are two additional F2'S which assist in instruction decoding, IDISP and +-ACSOURCE. The Imsp
function (F2= 15B) does a 16 way dispatch under control of a PROM and a multiplexer. The values are
tabulated below:
Conditions
if
IR[O] = 1
elseif
IR[l-2] = 0
elseif
IR[l-2] = 1
elseif
IR[l-2] = 2
elseif
IR[4-7] = 0
elseif
IR[4-7] = 1
elseif
IR[4-7] = 6
elseif
IR[4-7] = 16B
else
ORed onto NEXT
then 3-IR[8-9]
then IR[3-4]
then 4
then 5
then 1
then 0
then 16B
then 6
IR[4-7]
Comment
complement of SH field of IR
JMP,
JSR, ISZ, DSZ
IDA
STA
CONVERT
~ACSOURCE
(F2=16B) has two roles. First, it replaces the two-low order bits of the R select field with
the complement of the SrcAC field of IR, (IR[1-2] XOR 3), allowing the emulator to address its
accumulators (which are assigned to RO-R3).
Second, a dispatch is performed:

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