Panasonic DMR-EH59GC Service Manual page 64

6MHz
91 BIAS
BPF
+
6MHz
93 CLAMP
LPF
CLAMP/
95
BIAS
97 CLAMP
CLAMP/
99
BIAS
AV1 V
33 CLAMP
AV3 Y
41 CLAMP
AV3 C
45 BIAS
AV3 V
37 CLAMP
AV4 V
35 CLAMP
AV4 Y
39 CLAMP
AV4 C
43 BIAS
(SW10)
BIAS b
AV2 R/C
1 CLAMP a
AV2 G
3 CLAMP
AV2 B
5 CLAMP
AV2 V/Y
31 CLAMP
IC3001
VIDEO/AUDIO PROCESSOR
IC-DETAIL BLOCK DIAGRAM
(SW1) (SW2)
COMP
6MHz
R-Y
a a
OUT
12MHz b b 7
c c
(SW3)
AV1
a R-C
b OUT
9
c
d
(SW4)
6MHz COMP
B-Y
a
OUT
12MHz b 11
c
AV1
B
OUT
12
(SW6)
(SW5)
6MHz a COMP
Y
a b
OUT
12MHz b c 14
c d
DAC Rch
56
15
AV1 DAC Lch
64
G
OUT
17
20
AV4
AV1 Rch
(SW7) 52
Y
a OUT
19 AV1 Lch
60
b
AV2 Rch
AV4
(SW8) 53
C
a
OUT AV2 Lch
22 61
b
(SW9)
AV4
a
V
OUT
23
b
24
SV1
a
AV3 Rch
50
AV1
b
V/Y/C
c
OUT
d 26
e
AV3 Lch
58
SV2
a AV2
V
b
OUT
c 28
d
e
C-ADC
AV4 Rch
AV1 V OUT
51
81
AV3 Y
AV3 C
AV4 Lch
AV3 V V/Y
ADC 59
ADC
AV4 V
OUTPUT
OUT
AV4 Y SELECT 83
SWITCH
AV4 C
CIRCUIT
AV2 R/C
AV2 V/Y
TUNER V SLICER
85
SCL
88
IIC BUS
LOGIC
SDA
89
TUN Rch
54
TUNER
V TUN Lch
62
CLAMP 30
RF OUT
76
(SA1R)
a
BUFF.
b
c LPF
d
e
OUTPUT
SELECT SWITCH
(SA3R) (SA4R)
a a
b b
c c AGC
d d
e
(SA5R) (SA2R)
BUFF.
AV4 a
BUFF.
b
TUN c LPF
d
e
(SA2L)
a
BUFF.
b
c LPF
d
e
OUTPUT
SELECT SWITCH
(SA3L) (SA4L)
a a
b b
c c AGC
d d
e
(SA5L)
BUFF.
AV4
(SA1L)
TUN
a
BUFF.
b
c LPF
d
e
+
MUTE VCA
MIX
64
IC4001
AU +5V SWITCHING REGULATOR
IC-DETAIL BLOCK DIAGRAM
5
VOUT
IC
NR
1
AV1 Rch
MUTE 72
ADC Rch ADC Rch
79
AMP
AV2 Rch
MUTE 74
AV2 Lch
MUTE 73
ADC Lch
ADC Lch
78
AMP
AV1 Lch
MUTE 71
IC3001
IC4001
DMR-EH59GA/GC/GN IC-Detail Block Diagram
4
VIN
GND
H :ON
2 3
Detail Block Diagram
Detail Block Diagram