Q
P
O
N
MAINCOM (MAIN) 015 CIRCUIT DIAGRAM (TF5/TF3/TF1)
1
2
3
4
5
6
7
8
9
10
11
12
28CC1-2001133936-15
1
48
M
L
K
J
BUFFER
XX
XX
MICROPROCESSOR (MPU)
XX
MICROPROCESSOR (MPU)
XX : Not installed (未実装)
I
H
G
BUFFER
BUFFER
XX
XX
XX
XX
F
E
D
C
N.C.
to USBR-CN002
<P.50 K:2>
MAINCOM (MAIN) 015 CIRCUIT DIAGRAM (TF5/TF3/TF1)
B
A
TF5/TF3/TF1