Yamaha TF5 Service Manual page 105

LPC812M101JDH20J (YG479A00) MICROCONTROLLER (MCU)
PIN
NAME I/O
NO.
1 PIO0_17 I/O
2 PIO0_13 I/O General purpose digital input/output pin.
3 PIO0_12 I/O
4 RESET/ I/O External reset input: A LOW-going pulse as short
PIO0_5 as 50 ns on this pin resets the device, causing I/O
ports and peripherals to take on their default states,
and processor execution to begin at address 0./
General purpose digital input/output pin.
5 PIO0_4/ I/O General purpose digital input/output pin./This pin
WAKEUP/ triggers a wake-up from Deep power-down mode./
TRST In boundary scan mode: TRST (Test Reset).
6 SWCLK/ I/O Serial Wire Clock. SWCLK is enabled by default
PIO0_3/ on this pin./General purpose digital input/output
TCK pin./In boundary scan mode: TCK (Test Clock).
7 SWDIO/ I/O Serial Wire Debug I/O. SWDIO is enabled by
PIO0_2/ default on this pin./General purpose digital
TMS input/output pin./In boundary scan mode:
TMS (Test Mode Select).
8 PIO0_11 I
9 PIO0_10 I General purpose digital input/output pin.
10 PIO0_16 I/O
SRC4190IDBR (YG945A00) SAMPLE RATE CONVERTER
PIN
NAME I/O
NO.
1 LGRP I Low Group Delay Control Input (Active High)
2 RCKI I Reference Clock Input
3 N.C. - No Connection
4 SDIN I Audio Serial Data Input
5 BCKI I/O Input Port Bit Clock I/O
6 LRCKI I/O Input Port Left/Right Word Clock I/O
7 V - Digital I/O Supply, +1.65V to V
IO
8 DGND - Digital Ground
9 BYPAS I ASRC Bypass Control Input (Active High)
10 IFMT0 I
11 IFMT1 I Input Port Data Format Control Input
12 IFMT2 I
13 RST I Reset Input (Active Low)
14 MUTE I Output Mute Control Input (Active High)
PIN
FUNCTION
NO.
PIN
FUNCTION
NO.
DD
NAME I/O
11 PIO0_15 I/O General purpose digital input/output pin.
12 PIO0_1/ I/O General purpose digital input/output pin./Analog
ACMP_2/ comparator input 2./External clock input./In
CLKIN/ boundary scan mode: TDI (Test Data In).
TDI
13 PIO0_9/ I/O General purpose digital input/output pin./
XTALOUT Output from the oscillator circuit.
14 PIO0_8/ I/O General purpose digital input/output pin./
XTALIN Input to the oscillator circuit and internal clock
generator circuits. Input voltage must not
exceed 1.95 V.
15 V - 3.3 V supply voltage.
DD
16 V - Ground.
SS
17 PIO0_7 I/O General purpose digital input/output pin.
18 PIO0_6/ I/O General purpose digital input/output pin./
VDDCMP Alternate reference voltage for the analog
comparator.
19 PIO0_0/ I/O General purpose digital input/output port 0
ACMP_I1/ pin 0./Analog comparator input 1./In boundary
TDO scan mode: TDO (Test Data Out).
20 PIO0_14 I/O General purpose digital input/output pin.
NAME I/O
15 RDY O ASRC Ready Status Output (Active Low)
16 OWL1 I
Output Port Data Word Length Control Input
17 OWL0 I
18 OFMT1 I
Output Port Data Format Control Input
19 OFMT0 I
20 TDMI I TDM Data Input (Connect to DGND when not in use)
21 DGND - Digital Ground
22 V - Digital Core Supply, +3.3V
DD
23 SDOUT O Audio Serial Data Output
24 LRCKO I/O Output Port Left/Right Word Clock I/O
25 BCKO I/O Output Port Bit Clock I/O
26 MODE0 I
27 MODE1 I Serial Port Mode Control Input
28 MODE2 I
TF5/TF3/TF1
MAIN (MAINCOM): IC854
FUNCTION
MAIN (MAINCOM): IC653
FUNCTION
105