Download Print this page

Yamaha TF5 Service Manual page 323

Digital mixing console
Hide thumbs Also See for TF5:

Advertisement

H
G
BLOCK DIAGRAM 002 (TF5/TF3/TF1)
MAIN
1
LCDC
7" TFT
LVDS
w/ TP
IC602
(48P)
CN601(18P),
CN004(18P),
CN602(11P)
CN009(11P)
I2C
PNC
LCDEN3 etc.
SUB
2
CPU
IC003
(100P)
VDDS DDR
(CPU1.8V)
A1,A9,C1,C3,C7,
C9,E1,E9,H9,L1
CN008(19P)
CN317(19P)
TF5: PNFD8(4)
TF3: PNFD8(3)
TF1: PNFD8(2)
VMMC
(CPU3.3V)
C6,E6,F5,J10,K9,M4,N4,P3,P5
PNFD8
SUB
3
CPU
IC002
(100P)
+3.3D
6.4" OLED
ch-name Display
+5D
3,6,13,
+5D
23,28,
36,41,
2
47
VDET
PWRHOLD
R3312N471A
IC901(5P)
CPU3.3V
4
+3B
Battery
Vdd
6
CR2032
BT901
+5USB
USBR
HUB
5V/0.5A
Highside
GL852G
FET
switch
IC002
IC003(9P)
(48P)
DATA
X001
USBR_PON
12MHz
CN003(4P)
5
+5D
PS
+3.3D
PSU
/UVLO
6
4
28CA1-2001133894-2
1
F
CPU3.3V
CPU1.8V
CPU1.2V
CPU1.1V
/RESET
For
UART0
Debug
E15,E16
UART,
PIO3.3V
UART4
CTS, RTS
J18,K15
PCLK
2,8,21
AINx
RGB16bit
LVDS Tx
LCDC
DE
SN75LVDS84A
IC916
/SHTDN
(48P)
27
UART2
K18,L18
MODEL
UART3
Ladder
ADC
L16,L17
Resistors
ADC
CARD_PON
SHT_REV
/UVLO
+3.3DNT_PRT
SIO (SPI)
A13,A15,
SPI1
I2C1
I2C
B13,D12
LCD_RDY
E17,E18
UNLOCK
I2C Multi-Master (PLIO)
I2C2
/RESET
/RESET
+5D
1,14
Main CPU
PLL
TLC2932
IC905
RAM
AIPWR
DDR2 SDRAM
(324P)
DDR2
IC812(14P)
EMIF
2Gb x2
4Gb?
/Reset_HACPU
8bit x2
IC917(60P),
IC918(60P)
/Reset_ADDA
AM3352ZCZ60
PWR_CNT_DSP1/2/3
+3.3DNT_PRT,+3.3DSP_PRT
MMC
eMMC
MMC1
4GB
MAC Address Inside
IC923(94P)
UART
PIO3.3V
UART1
FET
D15,D16
/Reset
S2
D3
FT901
CPU1.2V
CPU3.3V
CPU1.8V
CPU1.1V
+3.3MFI
8
/PWRONRST
PMIC
MFi
/SYS_Reset
TPS65910AA1RSLR
MFI337S
I2C Address: 0101101x
I2C
3959
I2C0
IC903(49P)
I2C
Address:
0010000x
IC652(8P)
RTC
R2025S-E2-F
I2C Address: 0110010x
IC902(14P)
USB
USB0
+5USB
F16,M15,N17,
/Reset,
N18,P15,P16
/CS0, SEL1-3
VBUS_EN,
USBR_PON
SPI0
(master)
FLG_R
FOOT_SW1
ADC
RMII
H17,H18,J15,J16,
FOOT SWITCH
K16,K17,L15,M16
MDIO
JK901
M17
/Reset
GPIO1[29]
V6
/UVLO
IC921
25MHz
(8P)
X1102
E
D
+3.3DNT
/DNT_IRQ, GPIO[1]
15
Brdige CPU
SPI_B
LPC812
IC854(20P)
CARD_DET, DNT_DET
/RESET, LINK LED x2
GPIO[0], AUXB[1]
UART A
UART B
+3.3DSP
10,21,26,38,52,53,
DNT_MUTE
63,82,93,98,117,
128,129,135
Clock & Mute control
DNT_WCK, DNT_BCK
CPLD
IC851(20P)
/MUTE
(PLLPx)
IC852(20P)
DSP_MUTE[1]
IC802(144P)
MachXO
DSP_MUTE[2]
I2C Address: 0011 001x
256Fs, 64Fs, Fs
Internal or CARD
49.152MHz
45.1584MHz
X901
X902
/Reset_SRC, Bypass_SRC
/READY_SRC
+3.3MFI
10,19,26,38,57
/Mute_MFI
USB 2ch
Rec
PB/REC
2ch/line
+3.3SRC
D-FF
IC651(64P)
IC657(8P)
X701
PIC32MX470
BCK,WCK
SRC
I2C
128Fs, 64Fs, Fs
SRC4190
Play
Play
IC653(28P)
2ch/line
2ch/line
RST
+3.3DSP
CN652(9P)
SDRAM
SDRAM
1,3,9,15,29,35,41,
SDRAM
+5.9D
SDRAM
DATA 32bit
43,49,55,75,81
SDRAM
64Mb
64Mb
64Mb
64Mb
CN052(9P)
USBL
64Mb
5V/2.1A
IC102(86P),
Highside
IC202(86P),
LDO
switch
IC302(86P),
IC051(5P)
IC402(86P),
IC052(9P)
i.Pad
CN503
IC502(86P)
/CS1-5
138
IC601(16P)
SPI
/RESET
READY1-5
5
/ERR, /HALT
5x2
+3.3CPU
IC607(14P),
IC608(14P)
RJ-45
PHY
100BASE-TX
12
20MHz
LAN8710A-EZC
IC605(8P),
IC606(8P)
X601
JK902
IC915(25P)
25MHz
X1101
C
B
Switch
+3.3DNT
TPS2557DRBR
7,6
IC856(8P)
+3.3DNT_PRT
DC-DC
+5D
SLOT I/F
LT3615EUF
IC603(25P)
LDO
+5D
RP131H181
IC604(5P)
+1.2DSP2
IC853
Switch
(20P)
+3.3D
TPS2557DRBR
2,3
IC609(8P)
IC704
(5P)
+3.3DSP_PRT
+1.8DSP
+1.2DSP1
IC701(20P),
+1.2DSP2
IC702(20P)
+3.3DSP
B16,
E3
D1,G1,F6,G6,G7,
4
E5,
G10,G11,H6,H7,
E8,E9,
H10,H11,H12,J6,
E12,F5,
J7,J10,J11,J12,K6,
8ch/line
F11,F12,
K7,K10,K11,L6
G5,G12,
H5,K5,
I2C
DSP #1 <-> HAAD1/2
K12,L5,
I2C0
DSP #2 <-> HAAD3/4
L11,L12,
M5,M8,M9,
/Reset_HACPU
M12,R1,R16
/Reset_ADDA
ID
HAAD1/4: H
HAAD2/3: L
DSP x5
USB Multi-Track PB/REC
IC703(20P)
DSP x5
DSP x5
DSP x5
DSP x5
D81YK113DZKB400
/ANA_MUTE
USB Multi-Tr
USB Multi-Tr
IC101, IC201,
USB Multi-Tr
USB Multi-Tr
IC301, IC401,
PB/REC
PB/REC
IC501
EMIFB
PB/REC
2
PB/REC
8ch/line
D81YK113DZKB400
McASP
D81YK113DZKB400
D81YK113DZKB400
D81YK113DZKB400
2ch/line
2
SPI0
2ch/line
/Reset_ADDA
IC504(5P)
GPOn
SPI1
FET
/RESET
USB0_VBUS
FT601
(DSP #5)
PWR_CNT_DSP3
+3.3HUB
1,9,18
USB
USB0_DP/DM
USB
USB
(DSP #5)
HUB
USB2422
IC610(25P)
24MHz
X602
BLOCK DIAGRAM 002 (TF5/TF3/TF1)
A
TF5/TF3/TF1
+3.3D
2,3
CARD_PON
11,12
+1.2DSP1
11,12
+1.2DSP2
19,20
PWR_CNT_DSP1
+1.8DSP
5
+3.3DSP
7,6
PWR_CNT_DSP2
HAAD
HACPU
HACPU
8ch ADC
HACPU
+
IC903(48P)
+
8ch ADC
+
8ch ADC
8ch ADC
HACPU
IC902(64P)
DA2
DA1
8ch DAC x2
DA
IC004(48P)(DA1),
IC002(48P)(DA2)
JK
2ch DAC x1
IC901(28P)(DA1)
2ch ADC x2
8ch DAC x2
IC905(28P)(DA2),
IC906(28P)(DA2)
+3.3HUB
+5D
LDO
1
5
BU33TD3WG
IC611(5P)
TO HOST
CN602
Type-B

Advertisement

Chapters

loading

This manual is also suitable for:

Tf3Tf1