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CIRCUIT
U101
MBGM01PBS
Figure 4-72.
U18
TH_NC90
U19
TH_NC89
T9
TH_NC88
T10
TH_NC87
T11
TH_NC86
T12
TH_NC85
T13
TH_NC84
T14
TH_NC83
T15
TH_NC82
T16
TH_NC81
T17
TH_NC80
T18
TH_NC79
T19
TH_NC78
R9
TH_NC77
R10
TH_NC76
R11
TH NC75
Figure 4-73.
- 115 -
4. TROUBLE SHOOTING
R111
T23
VCOUT
T25
VCYOUT
200
T24
VCVREF
R23
R113
2.7K
VCVR0
P25
VCAVD1
(1%)
R25
VCAVD2
P26
VCAVS1
R26
VCAVS2
G25
R129
0
VLVD
CAM_VSYNC
G26
R130
0
VLHD
CAM_HSYNC
K23
VLCLK
K24
CAM_DATA0
VLDATA0
K26
VLDATA1
K25
VLDATA2
J26
VLDATA3
J25
VLDATA4
H26
VLDATA5
H25
VLDATA6
J24
VLDATA7
F27
R131
NA
VLVREF
G27
R132
NA
VLHREF
L26
PH6_VLCLKI
AG3
PD2_ISDA
AE6
PD3_ISCL
G3
PD5_AUMCLKO
C106
A2
P70_WTRG0_AUCLK
10p
B2
P71_WTRG1_AULR
E4
P72_WTRG2_AUDI
F3
P73_WTRG3_AUDO
AF6
P75_WPPG0
SHT_IRIS_CON1
AC6
P75_WPPG1
SHT_IRIS_CON2
AD6
P76_WPPG2
SHT_IRIS_CON3
AD4
P77_WPPG3
A4
ACLK24XO
A6
R115
10K
ACLK24XI
AF3
MD0
M3M_FLASHMD
U5
MD1
H1
MD2
E14
MD3
E8
MD4
HIGH
K1
LOW
VDDE1
A5
2V8_M3M_CORE
VDDE2
N3
VDDE3
Y3
VDDE4
U4
VDDE5
U24
VDDE6
H5
VDDE7
C107
C108
E18
VDDE8
1u
4.7u
E17
VDDE9
E12
VDDE10
D21
VDDEST11
(1%)
C105
(1%)
0.1u
CAM_PCLK
CAM_DATA0
CAM_DATA1
CAM_DATA2
CAM_DATA3
CAM_DATA4
CAM_DATA5
CAM_DATA6
CAM_DATA7
(GPO_2)
MODE
FLASH WRITE
NORMAL
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