Sony HBD-E2100 Service Manual page 65

Pin No. Pin Name
P43 FEGIO0
P44 FEGIO1
P45 FEGIO5
P46 DVCC33_IO_2
P47 FEGIO7
P48 FEGIO6
P49 FEGIO4
P50 FEGIO9
P51 FEGIO10
P52 FEGIO11
P53 FETRAYIN_
P54 FEGIO3
P55 USB_DM_P1
P56 USB_DP_P1
P57 USB_VRT_P1
P58 AVDD33_USB_P1
P59 EFPWRQ
P60 DVCC12_K_3
P61 DVCC33_IO_3
P62 SCL
P63 SDA
P64 SPDIF_IN1
P65 NFD0
P66 NFD1
P67 NFD2
P68 NFD3
P69 NFD4
P70 NFD5
P71 NFD6
P72 DVCC33_IO_4
P73 NFD7
P74 NFRBN
P75 NFREN
P76 NFCEN
P77 NFCLE
P78 NFALE
P79 NFWEN
P80 DVCC12_K_4
P81 DDRVCCK_1
P82 RDQ4
P83 RDQ6
P84 RDQ2
P85 DDRVCCIO_1
P86 RDQ0
P87 RDQ11
P88 RDQ9
P89 RDQ13
P90 RDQ15
I/O
LDD serial interface data. The pin is spike-free at power-on stage.
I/O The pin is not allowed to pull-up in circuit layout.
General IO
I/O PC RS232 serial receive data. The pin is spike-free at power-on stage.
O General IO
- 3.3V Digital IO Power
General IO. The pin is spike-free at power-on stage. The pin is not allowed to pull-up in
I/O
circuit layout.
Read gain switch 6. The pin is not allowed to pull-up in circuit layout.
O
General IO
Read gain switch 4
O
General IO
General IO. The pin is spike-free at power-on stage.
I/O
General IO
I/O PC RS232 serial receive data. The pin is spike-free at power-on stage.
I/O PC RS232 serial transmit data. The pin is spike-free at power-on stage.
I A logical Low indicates the Tray is IN
LED Control Output. Initial 0 Output. The pin is spike-free at power-on stage.
I/O
General IO
I/O USB port1 differential serial data bus (minus)
I/O USB port1 differential serial data bus (plus)
- USB port1 reference resistor
- 3.3V Analog power for USB port1
- 2.5 V power for E-fuse programming
- 1.2V Digital Power
- 3.3V Digital IO Power
I USB over current Protection indication
I USB PCONT
I HDMI ARC SPDIF input
I/O NAND Flash Data input/output bit0
I/O NAND Flash Data input/output bit1
I/O NAND Flash Data input/output bit2
I/O NAND Flash Data input/output bit3
I/O NAND Flash Data input/output bit4
I/O NAND Flash Data input/output bit5
I/O NAND Flash Data input/output bit6
- 3.3V Digital IO Power
I/O NAND Flash Data input/output bit7
I/O NAND Flash ready / busy
I/O NAND Flash read enable
I/O NAND Flash chip enable
I/O NAND Flash command latch enable
I/O NAND Flash address latch enable
I/O NAND Flash write enable
- 1.2V Digital Power
- 1.2V Digital Power
I/O Memory data bit 4
I/O Memory data bit 6
I/O Memory data bit 2
- 1.5V Digital IO Power
I/O Memory data bit 0
I/O Memory data bit 11
I/O Memory data bit 9
I/O Memory data bit 13
I/O Memory data bit 15
HBD-E2100/E3100/E3200/E4100/E6100
Description
Ver. 1.5
65