Only For Training And Service Purposes - LG GM310 Service Manual

4. RF Circuit Technical Brief
4.3.2 Transmitter
The direct-up conversion transmitter for each band consists of:
•fully differential signal path
•configurable input stages (programmable AC and DC input voltages)
•analog channel filter including auto calibration circuit (w/o external components)
•automatic carrier adjustment also featuring compensation of residual I/Q DC offsets
•I/Q modulator including LO buffer and I/Q divider
•LO including on-chip VCO and synthesizer
•RF voltage-controlled gain amplifier (VGA)
For each band, the modulator performs a direct quadrature modulation of the baseband input signals
at I and Q. The internally divided RF VCO signal is split into two orthogonal carriers. The gain of the
VGA is controlled by the voltage at the control pin TXGC. The robustness against PCB and baseband
processor spurious as well as noise is improved by an integrated baseband filter (Butterworth type).
The RF output signal is available at the differential outputs TXOUTH,/TXOUTHX, TXOUTM/TXOUTMX,
and TXOUTL/TXOUTLX. The modulator supply voltage must also be applied to these open drain
differential outputs.
TX Output Power
The voltage at the VGA control pin TXGC (VGC) should be limited to ensure that the specified
maximum output power (minimum Poutmax) is not exceeded. The VGC value at which the specified
minimum Poutmax is reached varies from device to device. ACLR and other specifications are only
valid for output power levels below the specified minimum Poutmax.
TX Front End
An external power amplifier as well as duplex and interstage filters are needed to form a complete
transmit chain for each band.
4.3.3 Synthesizer
The receiver and the transmitter contain each a complete fractional-N RF synthesizer with fast locking.
The VCO's run at 4 GHz and the RX and TX frequencies are obtained through division by two (bands I,
II, III and IV) or four (bands V and VI). The PLL loop filters are fully integrated. The reference
frequency has to be provided by an external clock.
The total VCO frequency range is divided in 256 subranges, in order to limit the VCO slope. Before the
settling process of the PLL starts, a successive approximation algorithm selects the most appropriate
subrange.
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GM310f service manual
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Only for training and service purposes