Deal With 8 Bits Data - Mitsubishi Electric MELSEC FX Series User Manual

FX communication
9.3.2

Deal with 8 bits Data

When M8161 is set to ON (M8161 is shared by an ASCII instruction, a HEX instruction and a
CCD instruction.)
M8000
M8161
X010
FNC 80
RS
Send data
(Programmdble
controller →
External
equipment)
Receive data
(External
→
equipment
Programmdble
controller)
1 ) Send data and remaining number of send data
Send data SD (TXD)
Remaining number
of send data D8122
2 ) Receive data and number of receive data
Receive data RD (RXD)
Number of receive data
D8123
8-bit mode
S· D·
m
D200 K 4 D500
STX D200 lower D201 lower D202 lower D203 lower
Header
Head address specified by
Send byte count
specified by "m"
STX D500 lower D501 lower D502 lower D503 lower D504 lower D505 lower
Header
Head address specified by
It does not exceed the upper limit number
of receive data points (byte count)
specified by "m".
Receive is completed when the terminator
(ETX) or "n" points are received.
4
3
2
1
3
2
1
0
Ignored
n
The upper 8 bits are ignored,
and the lower 8 bits exclusiuely
K 10
are regarcled as valid.
ETX
Terminator
S ·
D·
0
The number of
6
5 receive data is also
4
reset when the
receive completion
flag M8123 reset.
RS instruction 9
16-bit data
Lower 8 bits
ETX
Terminator
9-14