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Intel® SHG2 DP Server Board Technical Product Specification
2.4.6
Power Management
One of the embedded functions of CSB5 is a power management controller. The SHG2 server
board uses this to implement ACPI-compliant power management features. The SHG2
supports four sleep states: S0, S1, S4, and S5.
2.4.7
General Purpose Input and Output Pins
The CSB5 provides a number of general-purpose input (GPI) and general-purpose output
(GPO) pins. Many of these pins have alternate functions, and thus all are not available. Table 2
lists the GPI and GPO pins used on the SHG2 baseboard and gives a brief description of their
function.
Pad
V3
W2
W3
W4
Y4
Y1
Y2
Y19
V17
U16
V15
T20
T19
T18
Y16
V12
U12
V19
W20
U14
Y20
Revision 1.0
Table 2. CSB5 GPIO Usage Table
Usage
CMIC_FATALN
CMIC_ALERTN
SCSI_IDSEL_EN
CIOB1_ALERTN
CSB5_NMI
BMC_IRQ_SMI-10
LAN1_IDSEL_EN
NVRAMCLR
PASSDIS-00
CMOSCLR-00
VENDER_SEL
F3SETUPEN-00
BMC_SCI-10
BMCISPMD-00
SIDE_A+000
SIDE_A+001
SIDE_A+002
LAN2_IDSEL_EN
VGA_IDSEL_EN
FRWPN
ROM_CSN
Intel Order Number C11343-001
Description
CMIC fatal error condition
CMIC error condition
SCSI ID select enable
CIOB error condition
CSB5 NMI condition
BMC SMI condition
LAN1 ID select enable
Non-volatile RAM clear status
Allows password to be disabled
CMOS clear status
Monitor PCIRST# signal
Enable Inspection Mode for factory use
BMC system control interrupt status
Reserved
Secondary IDE addressbit 0
Secondary IDE address bit 1
Secondary IDE address bit 2
LAN2 ID select enable
Video ID select enable
Enable Frimware Write Protect Mode
BIOS flash chip select
Processor and Chipset
13
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