Sony DSR-1800 Service Manual page 204

D0
JIG 1-9
D1
JIG 1-10
D2
JIG 1-11
D3
JIG 1-12
D4
JIG 1-13
D5
JIG 1-14
D6
JIG 1-15
D7
JIG 1-16
D8
JIG 1-17
D9
JIG
1-18
D10
JIG 1-19
D11
JIG 1-20
D12
JIG 1-21
D13
JIG 1-22
D14
JIG 1-23
D15
JIG 1-24
A0
JIG 1-25
A1
JIG 1-26
A2
JIG 1-27
A3
JIG 1-28
A4
JIG 1-29
A5
JIG 1-30
A6
JIG 1-31
A7
JIG 1-32
A8
JIG 1-33
A9
JIG 1-34
A10
JIG 1-35
A11
JIG 1-36
A12
JIG 1-37
A13
JIG 1-38
A14
JIG 1-39
A15
JIG 1-40
A16
JIG 1-41
A17
JIG 1-42
A18
JIG 1-43
A19
JIG 1-44
CS0
JIG 1-45
CS3
JIG 1-46
CS2
JIG 1-47
WRH
JIG 1-48
WRL
JIG 1-49
RD
JIG 1-50
DOWN/UP
JIG 1-8
H-JIG_EXIST
JIG 1-7
JIG 1-6 SY_JIG_RY/BY
JIG 1-5 L_RESET
IC512
RS-422
RECEIVER
RM_TX(+)
102-146
RS-422
RM_TX(-)
DRIVER
102-144
RM_RX(+)
102-143
RS-422
RM_RX(-)
RECEIVER
102-142
RS-422
DRIVER
IC512
P-TRKT
TP501
P-TRKT
NSG OE
IF820,103-3 102-123
H_MOTOR_OFF
PRE-45,201-33 102-67
H_JC_RESET
IF-820,201-41 102-131
H_AUDIO_OUT_MUTE
IF-820,104-44,HP-108,109-12 102-148
H_JC_RESET
IC517
PLD_RESET
IC517
L_RESET
PRE-45,201-32 L_CPU_RESET
KY-484,108-2,DR-428,303-4 102-130
IF-820,103-10 IC506
IC505
Q500
RESET
S500
GND GND
SSP-23 (3/5)
FLASH MEMORY
1-8 IC519
IC500,516
A1-19 16-25
IC517
48
A0-18
19
RD D0-15
WRL 28
OE
OE/WE
11
CS0
DECODER
WE
CS2
SRAM
IC503
1-5,18-21
A1-16
24-27,42-44
A0-15
16
D0-15
A0 40
BHE
WRH 39
BLE
CS1 6
CS
41
RD
OE
17
IC500,504
SY/SP CPU
WE
IC517
IC501 WRL
1-3,5-12
A16
14,16-19 WE
68
DECODER
IC514 PA15 AD0-15
16
SW
20-23,25-31
33-37,39-40
42-45
96 A0-21
TXD1 22
57 RD
58 RD
PA7 55 WRL
WRL
95 56 WRH
SW RXD1 WRH
IC514 46 CS0
CS0
47 CS1
CS1
48
CS2
CS2
60 49 CS3
PA8 CS3
53 CS6
CS6
62
PA10 67
PA14 SY_FLASH_RY/BY
SY_JIG_RY/BY
83
PB0
86
PB3 97
SY_SCK
SCK0
93
SY_SI
RXD0
94
SY_SO
90 TXD0
PB6
91
PB7
66
FPGA_INIT PA13 98
IRQ5
65 IRQ5
FPGA_DONE PA12 99
IRQ6
IRQ6
100
IRQ7
IRQ7
69
CK SY_SYS_CK
+5V
TP503
84
PB1
76
RESET L_RESET
XTAL EXTAL
72 71
X500
19.6608MHz
13-32
SSP-23 (3/5)
IC515
2-9 11-18
D0-7 8 8 D0-7
19
CS6
G
RD 1
DIR
IC511,513
2-9 11-18
A0-12 13 13 A0-12
3 17 WRL
WRL
4 16 RD
RD
D0-7
IC518 8
15 CS8
1-3
14 CS9 11
WRL
A18-20
DECODER
13 CS10 1
CS12
29-36
38-45
A21 4 12 CS11
G
16 5 11 CS12
CS6
G
RY/BY
SV_FLASH_RY/BY
12
L_RESET
7-10,13-16
29-32,35-38
16
D0-15
FPGA_DONE
13-32
SY_D_BUS
SY_A_BUS
SY_C_BUS
NVRAM
IC600
2-10,21
23-25
11-13
A0-12
15-19
A0-12 13
20 D0-7
CS10
CE 8 D0-7
22
RD
OE
27
WRL
WE
IC603
2 0
5
OUTPUT 1
LATCH
6 2
9
3
CLK
CLK_EN
SY_SCK
SY_SO
SY_SI
IC509
SY_SCK_3V
SY_SO_3V
IC509 SY_SI_3V
IC510
18 2
1
3
IC507,508
0
DECODER
1
2
3 C1P_MCS
C1P_SCS
DV_CS
DIF_CS
SDI_CS
System/servo/analog audio input . output process
SSP-23 (3/5)
LOT NO. 064-
002
002
002
SY_SIO 002
102-128 IF-820,103-8,KY-484,108-6
102-127 IF-820,103-7,KY-484,108-4
102-126 IF-820,103-6,KY-484,108-5
KY_CS
102-134 KY-484,108-3
NSG_CS
102-124 IF-820,103-4
NCG_CS
102-122 IF-820,103-2
VPR_AD_CS
102-132 IF-820,104-80
FPGA_CS
SY_INT 002
DSR-1800/P/1600/P