Diagrams; Ic Pin Functions - Sony CDP-XE200 Service Manual

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4-1. IC PIN FUNCTIONS

• IC101 CXD2545Q (DIGITAL SERVO & DIGITAL SIGNAL PROCESSOR)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
TE
L 13942296513
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
www
43
44
45
.
46
47
http://www.xiaoyu163.com
Pin Name I/O
SRON O Sled drive output (Not used.)
SRDR O Sled drive output
SFON O Sled drive output (Not used.)
TFDR O Tracking drive output
TRON O Tracking drive output (Not used.)
TRDR O Tracking drive output
TFON O Tracking drive output (Not used.)
FFDR O Focus drive output
FRON O Focus drive output (Not used.)
FRDR O Focus drive output
FFON O Focus drive output (Not used.)
VCOO O VCO output for analog EFM PLL. (Not used.)
VCOI I VCO input for analog EFM PLL. (Ground)
TEST I TEST pin connected normally to Ground.
DVSS — Digital Ground
TES2 I TEST pin connected normally to Ground.
TES3 I TEST pin connected normally to Ground.
PDO O Charge-pump output for analog EFM PLL. (Not used.)
VPCO O Charge-pump output for variable pitch PLL. (Not used.)
VCKI I Clock input from variable pitch external VCO. (Ground)
AVD2 — Analog power supply
IGEN I Power supply pin for operational amplifiers.
AVS2 — Analog Ground
ADIO I (Not used.)
RFC O (Not used.)
RFDC I RF signal input
TE I Tracking error signal input
SE I Sled error signal input
FE I Focus error signal input
VC I Center voltage input pin
FILO O Filter output for master PLL.
FILI I Filter input for master PLL.
PCO O Charge-pump output for master PLL.
CLTV I Control voltage input for master VCO.
AVS1 — Analog Ground
RFAC I EFM signal input
BIAS I Asymmetry circuit constant current input
ASYI I Asymmetry comparate voltage input
ASYO O EFM full swing output
AVD1 — Analog power supply
DVDD — Digital power supply
ASYE I Asymmetry circuit ON/OFF
PSSL I Audio data output mode selection input. (Ground)
x ao
y
WDCK O 48-bit slot D/A interface. Word clock
LRCK O 48-bit slot D/A interface. LR clock
i
DATA O DA 16 output when PSSL=1. 48-bit slot serial data when PSSL=0.
BCLK O DA 15 output when PSSL=1. 48-bit slot data when PSSL=0.
http://www.xiaoyu163.com
SECTION 4
8

DIAGRAMS

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u163
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2 9 9 4 2 8
Function
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2 8 9 9