LG 50PK950 Training Manual page 163

50PK950 LVDS Control Board P31 from P902 Main Board Waveforms
P31 LVDS (Pin 12) 5Msec / 728mV
Main Control
Note: Pin 13 is Same but Inverted
P902 P31
Pin Pin
1 50-51
3 49
4 48
5 47
6 46-44
*11 *41
*12 *40
*13 *39
*14 *38
15 37
16 36 Clock
17 35 Clock
18 34
*19 *33
*20 *32
*21 *31
*22 *30 P31 LVDS (Pin 11) 2uSec / 728mV
*23 *29
*24 *28
P31 LVDS (Pin 22) 5Msec / 683mV
25-26 26-27
Note: Pin 23 is Same but Inverted
*27 *25
*28 *24
*29 *23
*30 *22
31 21
32 20
Clock
33 19 Clock
34 18
*35 *17
*36 *16
*37 *15
*38 *14
*39 *13
*40 *12
41 11
42-45 7-10
46 6
47 5
48 4
P31 LVDS (Pin 226) 2uSec / 683mV
49 3
50 2
P31 LVDS (Pin 32) 5Msec / 1.12V
51 1
Note: Pin 33 is Same but Inverted
NOTE: LVDS P31
Information
There are actually 20
pins carrying Video 4
pins are carrying clock
signals to the Control
board. With 1080P, pins
35 and 36 would have
signals present.
WAVEFORMS:
Waveforms taken using
1080P SMTP Color Bar
input. All readings give
their Time Base related
P31 LVDS (Pin 32) 2uSec / 1.12V
to scope settings.
P31 LVDS (Pin 14) 5Msec / 618mV
Note: Pin 15 is Same but Inverted
P31 LVDS (Pin 14) 2uSec / 618mV
P31 LVDS (Pin 24) 5Msec / 448mV
Note: Pin 25 is Same but Inverted
P31 LVDS (Pin 24) 2uSec / 448mV
P31 LVDS (Pin 35) 5Msec / 1V
Note: Pin 36 is Same but Inverted
P31 LVDS (Pin 35) 2uSec / 1V
P31 LVDS (Pin 16) 5Msec / 738mV
Note: Pin 17 is Same but Inverted
P31 LVDS (Pin 16) 2uSec / 738mV
P31 LVDS (Pin 28) 5Msec / 768mV
Note: Pin 29 is Same but Inverted
P31 LVDS (Pin 28) 2uSec / 768mV
P31 LVDS (Pin 38) 5Msec / 1.15V
Note: Pin 39 is Same but Inverted
P31 LVDS (Pin 38) 2uSec / 1.15V
P31 LVDS (Pin 19) 5Msec / 758mV
Note: Pin 20 is Same but Inverted
P31 LVDS (Pin 19) 2uSec / 758mV
P31 LVDS (Pin 30) 5Msec / 1.3V
Note: Pin 31 is Same but Inverted
P31 LVDS (Pin 30) 2uSec / 1.3V
P31 LVDS (Pin 40) 5Msec / 910mV
Note: Pin 41 is Same but Inverted
P31 LVDS (Pin 41) 2uSec / 910mV