Integra DTR-50.1 Service Manual page 27

A B
Q Q
3 7 6 3 1 5 1 5 0
SCHEMATIC DIAGRAM-17
U005
HDMI CIRCUIT PC BOARD-10
BAHDM-0132-1E
(PART-22) DSP 3RD SECTION
1
2
T E
L 1 3 9 4 2 2 9 6 5 1 3
3
4
+2.4VDSP
w w w
5
VDD_DSP3.3V
.
DSP3_CLKIN
C
SPI0 & control signals
TX-SR707/ DTR-40.1
TX-NR807/ DTR-50.1
from 2nd DSP
R3511 220
R3510
330
R3516
from 3rd DSP
R3515
DIGSDO R3516
R3518
DIGSDI
C3510
DSPFL_LHW3 R3520
DSPFR_RHW3 R3523
DSPSL_SBL3 R3524
DSPSR_SBR3 R3525
DSPSWL_SWR3 R3527
DSPC3 R3528
33X4
EM3_A12
C3517
EM3_A13
EM3_A14
C3519
EM3_A15
R3529
C3521
ADSP2_SD0 R3534
R3536
ADSP2_SD1
C3526
R3537
ADSP2_SD2
ADSP2_SD3 R3538
C3528
R3540
ADSP2_SD4
ADSP2_SD5 R3541
ADSP2_BCK R3542
R3543
ADSP2_LRCK
CX_BCK3 MMZ1608Y601B L3503
R3544 330
R3546
0 R3622
R3547
CX_LRCK3
ADSP_MCK
C3542 106K/6.3
DSP3_RST
C3548
Q3504
BD7820
C3549 105Z
C3551 105Z
R3566 3.9KF
VDD_D3COR1.2V
22KF
R3565
220KF
1 2 R3567
D3501
1SS352
GND_ARM
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D E
8
+3.3V
+1.2V
NC
109
330
110
47
111
105Z 112
47
113
AXR0[0] VSS
114
VSS SPIO_SIMO
47
115
AXR0[1] SPIO_SOMI/I2C0_SDA
47
116
AXR0[2] DVDD
47
117
AXR0[3]
118
VSS
47
119
AXR0[4]
47
120
Q3502
AXR0[5]/SPI1_SCS
121
AXR0[6]/SPI1_ENA]
TMS320DA788
122
AXR0[7]/SPI1_CLK
105Z 123
CVDD
D788E001BRFP266
124
VSS
105Z 125
DVDD
126
AXR0[8]/AXR1[5]/SPI1_SOMI
127
AXR0[9]/AXR1[4]/SPI1_SIMO
105Z
128
CVDD
Q Q
129
3 7 THERMALPAD 6 3
VSS
330
130
AXR0[10]/AXR1[3]
330
131
AXR0[11]/AXR1[2]
105Z 132
CVDD
133
VSS
330
134
AXR0[12]/AXR1[1]
330
135
AXR0[13]/AXR1[0]
105Z 136
DVDD
330
137
AXR0[14]/AXR2[1]
330
138
AXR0[15]/AXR2[0]
330
139
ACLKR0
140
VSS
330
141
AFSR0
142
ACLKX0
47
143
AHCLKR0/AHCLKR1
47
144
AFSX0
R3548 47
C3543 105Z
R3564
106K/6.3
C3546
1K
106K/6.3
NC_ACF451832-333
L3504
BLM18PG121SN1D
L3508
+3.3V
u 1 6 3
.
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F G
2 4
9 9 8
EM3_A14
EM3_A13
EM3_A12
EM3_A11
EM3_A10
EM3_A9
EM3_A8
72 EM3_A7
VSS
71 R3517 EM3_CKE EM3_A18
EM_CKE
L3501 R3519 33
70 EM3_CLK EM3_A19
EM_CLK
75
69 0 C3511 EM3_WE
VSS
68 C3512 #100D DSP3_RST
DVDD
105Z R3522
67 EM3_UDQM
EM_WE_DQM[1]
33
66
EM_D[8]
R3526
65 C3515 EM3_D8
CVDD
64 105Z EM3_D9 EM3_A17
EM_D[9]
63 EM3_D10 EM3_A16
EM_D[10]
62 EM3_D11 EM3_A6
VSS
61 EM3_A5
33X4
EM_D[11]
C3516
60 EM3_A4
DVDD
59 105Z EM3_A3
EM_D[12]
R3530
58 EM3_D12 EM3_A2
EM_D[13]
C3518
57 EM3_D13 EM3_A1
CVDD
56 105Z EM3_D14 EM3_A0
EM_D[14]
55 EM3_D15
EM_D[15]
54
33X4
VSS
C3522
53 GND_ARM
CVDD
R3535
52 105Z EM3_D0
1 5 1 5 0 8 9 2 4
EM_D[0]
51 EM3_D1
EM_D[1]
C3524
50
DVDD
49 105Z EM3_D2 EM3_D0
EM_D[2]
48
33X4
EM_D[3]
R3539
47 EM3_D3 EM3_D1
VSS
46 EM3_D4 EM3_D2
EM_D[4]
45 EM3_D5
EM_D[5]
C3530
44 EM3_D6 EM3_D3
CVDD
43 105Z EM3_D4
33X4
EM_D[6]
42 C3531
DVDD
41 105Z EM3_D5
EM_D[7]
R3545
40 EM3_D7 EM3_D6
VSS
39 EM3_LDQM
EM_WE_DQM[0]
38 EM3_WE EM3_D7
EM_WE
37 EM3_CAS
EM_CAS
EM3_LDQM
33X4
EM3_WE
EM3_CAS
EM3_RAS
+1.2V
EM3_SDCS
EM3_BA0
+3.3V
EM3_BA1
EM3_A10
EM3_A0
EM3_A1
EM3_A2
EM3_A3
m
c o
DTR-50.1
H
2
9 9
GND_ARM
1 48 EM3_A15
A15 A16
2 47
A14 BYTE
3 46
A13 GND
4 45 EM3_D15
A12 Q15/A-1
5 44 EM3_D7
A11 Q7
6 43 EM3_D14
A10 Q14
7 42 EM3_D6
A9 Q6
8 41 EM3_D13
A8 Q13
9 40 EM3_D5
A19 Q5
TP113 10 39 EM3_D12
A20 Q12
11 38 EM3_D4
WE Q4
12 37 C3513
RESET VCC
R3521 470 105Z
13 36 EM3_D11
NC Q11
14 35 EM3_D3
C3514 101J
WP/ACC Q3
15 34 EM3_D10
RY/BY Q10
TP114
16 33 EM3_D2
A18 Q2
17 32 EM3_D9
A17 Q9
18 31 EM3_D1
A7 Q1
19 30 EM3_D8
A6 Q8
20 29 EM3_D0
A5 Q0
21 28 EM3_OE
A4 OE
22 27
A3 GND
23 26 EM3_FCS
A2 CE
24 25 EM3_BA1
A1 A0
106K/6.3
VDD_3FLS3.3V
C3520
L3502 C3523
BLM18PG121SN1D
105Z
9 8 2 9 9
+3.3V
C3525
1 54
VDD VSS
105Z 2 53 EM3_D15
DQ0 DQ15
C3527 3 52
VDDQ VSSQ
105Z
4 51 EM3_D14
DQ1 DQ14
5 50 EM3_D13
DQ2 DQ13
6 49 C3529
VSSQ VDDQ
105Z
7 48 EM3_D12
DQ3 DQ12
8 47 EM3_D11
DQ4 DQ11
C3532 9 46
VDDQ VSSQ
105Z 10 45 EM3_D10
DQ5 DQ10
11 44 EM3_D9
DQ6 DQ9
12 43 C3533
VSSQ VDDQ
13 42 105Z EM3_D8
DQ7 DQ8
C3534
14 41
VDD VSS
105Z 15 40
LDQM NC
16 39 EM3_UDQM
WE UDQM
17 38 EM3_CLK
CAS CLK
18 37 EM3_CKE
RAS CKE
19 36
CS NC
20 35 EM3_A11
BA0 A11
21 34 EM3_A9
BA1 A9
22 33 EM3_A8
A10 A8
23 32 EM3_A7
A0 A7
24 31 EM3_A6
A1 A6
25 30 EM3_A5
A2 A5
26 29 EM3_A4
A3 A4
C3545
27 28
VDD VSS
105Z
106K/6.3
VDD_3SDR3.3V
C3547
C3550
105Z
+3.3V