Integra DTR-50.1 Service Manual page 10

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Q Q
3 7 6 3 1 5 1 5 0
BLOCK DIAGRAM-4
DSP/ ETHER/ USB SECTION
24.576MHz
T E
L
1 3 9 4 2 2 9 6 5 1 3
SPDIF0
SPDIF1
SPDIFn
SPDIF out
DIR/CODEC/ADC/DAC
ADC_LR analog
from ASP block
Analog 8chMax
to ASP block
w w w
.
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DSP/Ether/USB Block
from HDMI block
NAND Controles
NANDFlash
EMFA_A[1:2]
EMFA_D[0:7]
256Mbit
DSPINPSEL
DSDSLRSEL
SW
DIG/NETUSB
256fs
MCK
MCK_Digital
I2S_IN x4/DSD x6
RMCK
DSPINPSEL
I2S_DIR x4
DIRINT
DIRRST
DIRCS
SPIO
DACRST
DACCS3
DACCS2
DACCS1
DAC x4 block (max8ch)
I2Sx4/DSD
I2Sx4
Val
x
a o
u 1 6 3
y
i
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8
Depend on Total cost of AVR.
USB FS
RJ-45
Reserved
USB HS HOST
HiSideSw
+5
SDR SDRAM(x16bit)
EtherPHY
256Mb?? x2pcs
HiSideSw
Val
EMIFB
x32DataBus
EMIFA
Reserved
UART1
UART2
GPIO x2
I2C0
AHCLKX1
DualCoreProcessor ARM + DSP
Q
Q
RESET
3
7
6
3
1
McASP1
DA830
GPIO x2
AXR1[n] x6
SPI1
Master
GPIO x11
GPIO x3
AXR2[0]
AHCLKX0
/AHCLKX2
McASP0
AXR0[14]
24MHz
SPIO
64Mb or 128Mb
-May use either Flash momory (NAND flash or Serial flash) for system ROM include boot image.
I2Sx4
2nd DSP
Val
25MHz
c o
NOR Flash
SDRAM
.
Val
Val
2
4
9
9
8
Reserved
+5V
+5V
Level Convert
UART1
RS-232C
for SerialConsole
UART2(no use, assigned to SPI)
I2C0 (Reserved)
83x_RST
5
1
5
0
8
9
2
4
9
HOST_REQ
HOST_CS
SPI1
DIGMUT3
DIGMUT2
DIGMUT1
NETUSB_SPDIF
Reserved
256fs
256fs
2ch DAC
AMUT0
NETUSB_LR analog
I2S_NETUSB
NET/USB
12.288MHz
256fs
11.2896MHz
SerialFlash
m
DTR-50.1
2
9
9
8
2
9
9

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