Table of Contents
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Index
Numerics
15-pin D-SUB connector, 3-3
cable specifications, A-1
overview, 3-3
pin assignments (figure), 3-3
A
acquisition and region of interest (ROI)
circuitry, 2-7
acquisition start conditions, 2-8
acquisition window control
active pixel region (acquisition
window), 2-7
region of interest, 2-7
B
Base configuration, Camera Link, 2-2
block diagram of NI 1426 (figure), 2-1
bus master PCI interface, 2-8
C
cabling
15-pin D-SUB connector, A-1
Camera Link cable (figure), A-2
Camera Link cables, A-1
calibration certificate (NI resources), B-2
Camera Link
Base configuration, 2-2
cabling
description, A-1
ordering information, A-2
overview, 1-4
CC<4..1>± signal (table), 3-4
clock signals, XCLK± signal (table), 3-4
© National Instruments Corporation
configuration, Camera Link
Base configuration, 2-2
connectors
15-pin D-SUB connector, 3-3
I/O connector signals (table), 3-4
MDR 26-pin connector (figure), 3-2
NI 1426 connectors (figure), 3-1
signal description (table), 2-5, 3-4
conventions used in manual, v
D
data formatter, multiple tap, 2-3, 2-4
data transmission, 2-2
Declaration of Conformity (NI resources), B-1
delayed acquisition start conditions, 2-8
DGND signal (table), 3-4
diagnostic tools (NI resources), B-1
DMA controllers, 2-8
documentation
conventions used in the manual, v
NI resources, B-1
drivers (NI resources), B-1
D-SUB connector, 15-pin, 3-3
cable specifications, A-1
overview, 3-3
pin assignments (figure), 3-3
E
examples (NI resources), B-1
H
hardware overview, 2-1
acquisition, region of interest (ROI), 2-7
binarization, 2-3
block diagram (figure), 2-1
I-1
NI PCI-1426 User Manual
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