Samsung CLX-6210FX Service Manual page 46

• CPU : CLX-6200 Series : Chorus3 (SoC)
CLX-6240FX : Mips 7065C 533MHz + SPGPXm
• Memory :
- RAM : CLX-6200 : DDR2 Default 128MB + Option 128/256MB
CLX-6240 : DDR1 Default 256MB + Option 128/256/512MB
- ROM : 16MB+8MB
- EEPROM : 64kb
• Peripherals :
- USB 2.0
- 10/100 Based N/W (MII Interface Phy Chip Used)
• I/O :
- Digital I/O Port : Basic I/O, PWM : Motor & HVPS Control
- UART : Debug, FAX, OP
- I2C : EEPROM & SDRAM & CRUM Interface
- Analog I/O Port (ADC : Sensor Interface, DAC : LD Power Control)
Chorus 3 Architecture (CLX-6200 Series)
• CPU Core : ARM9266EJS 360Mhz (I-Cache : 16KB, D-Cache : 16KB)
• SDRAM Controller : 4 bank DDR1 SDRAM and 4 & 8 bank DDR2 SDRAM
(DDR2 2DIMM Used, 166MHz), 120Mhz System Bus
• ROM Controller : 2 Banks ( 1 Bank Used)
• I/O Controller : 4 Channel
• DMA Controller : 3 Channel
• HPVC : 4 Channel Dual / Single Beam
• UART : 4 Channels (Debug, OP, FAX 3 Channel used )
• Interrupt : 4 External, 64 Internal
• TIMER : 6 System Timer
Mips + SPGPXm Architecture
• CPU : Mips IV 533Mhz (I-Cache : 16KB, D-Cache : 16KB, Secondary-
Cache : 256KB)
• SDRAM Controller : 4 bank DDR1 SDRAM (2 DIMM Used) , 120Mhz System Bus
• ROM Controller : 4 Channel NOR, 1Channel NAND ( 1 Channel NOR Used)
• I/O Controller : 6 Channel
Service Manual
Product spec and feature
2-35
Samsung Electronics