Power Management - Motorola E685 Service Manual

Cdma 800mhz
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16bit parallel data. Camera is VGA CMOS and operates low power mode. It is controlled by I2C
protocol of MSM6100 IC (IC201). The image, which captured by camera, sends to MSM6100 using
8bit YCbCr Data and then displayed to the LCD. It is possible to give body to encoder/decoder
function using JPEG format
6 . EAR PHONE
When the Earphone is inserted to the earphone jack (EAR300), earphone function can use as
like the receiver and the microphone. In this case, the MIC of handset change as mute state and
the MIC of earphone is activated, and also the receiver of handset changes as mute state and
the receiver of earphone is activated. There is a key to make a call or end a call when the
earphone is inserted to the earphone jack (EAR300), and It is detected by the AN32200A

3-2. Power Management

1 . AN322 01A (Ba se-Band Power Management)
The AN32201A replaces the role of the several LDO regulators, the reset controller and discrete
logic needed in the former Logic block such as SMPL. It is interfaced to the MSM6100 by the I2C
bus. It generates power which is needed the STJ such as VDDP-2.6, VDDC-1.8, VDDA-2.6 and
AVDD. They can be adjusted the voltage level of each power by the I2C. The AN32201A is
turned on combination of signals. For example, the POWERKEY, EXTPWRON, REMPWRON and
PSHOLD. In the case of VDDC-1.8, it is possible to select the mode from LDO to DCDC by
TCXO_EN to protect
power-cut circuit. So, if the battery connection is made within two sec, the power is
automatically switched on without needs of the push of the terminal power key.
2 . AN322 00A (RF Power Management)
Like the AN32201A, the AN32200A replaces the role of discrete LDO regulators in the former RF
block. It interfaces to the MSM6100 by I2C bus. It receives the battery power and outputs the
adequate power to operate each RF blocks. It generates VTX, VRX, VTCXO, VPLL, V_RUIM and
V_VIB for STJ. The voltage level of each power can be adjusted by the I2C protocol. When STJ
changes the operation mode from sleep to idle through the TCXO_EN signal, the buffer circuit,
which integrated to the AN32201A supplies the stable TCXO clock for the MSM6100. In addition,
it integrates the SEND/END key detection function for earphone operation and has built in
general 3 channel PWM circuits.
power consumption. Besides, it has SMPL block that replaces the role of
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