Pin Description - Integra DTR-7.9 Service Manual

QQ
3 7 63 1515 0
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -53
Q8005 MX29LV320(32Mbit CMOS Flash memory)
BLOCK DIAGRAM
RESET
BYTE
A0~A20
TE
L 13942296513

PIN DESCRIPTION

1
A15
2
A14
3
A13
4
A12
5
A11
6
A10
7
A9
8
A8
9
A19
10
A20
11
WE
12
RESET
13
NC
14
WP/ACC
15
RY/BY
16
A18
17
A17
www
18
A7
19
A6
20
A5
21
A4
22
A3
23
A2
.
24
A1
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CONTROL
WE
INPUT
OE
LOGIC
WP
ADDRESS
LATCH
AND
BUFFER
Q0-Q15/A-1
MX29LV320AT/B
x ao
y
i
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8
PROGRAM/ERASE
HIGH VOLTAGE
MX29LV320AT/B
FLASH
ARRAY
Y-PASS GATE
PGM
SENSE
DATA
Q Q
AMPLIFIER
3 6 7 1 3
HV
PROGRAM
DATA LATCH
I/O BUFFER
PIN NAME
48 A16
47 BYTE
GND A0~A20
46
Q15/A-1
45
Q0~Q14
44 Q7
Q14
43
Q15/A-1
Q6
42
Q13
41
40 Q5
CE
Q12
39
Q4
38
WE
VCC
37
Q11 OE
36
Q3
35
BYTE
Q10
34
Q2
33
RESET
Q9
32
Q1
31
RY/BY
Q8
30
VCC
Q0
29
u163
OE
28
WP/ACC
GND
27
CE
26
GND
.
A0
25
TX-SR806/SA806
2 9 9 4 2 8
WRITE
STATE
MACHINE
(WSM)
STATE
REGISTER
COMMAND
DATA
DECODER
1 5 0 5 8 2 9 9 4
COMMAND
DATA LATCH
DESCRIPTION
Address Input
Data Input/Output
Q15:Data Input/Output,word mode
A-1:LSB Address Input,byte mode
Chip Enable Input
Write Enable Input
Output Enable Input
Word/Byte Selection Pin
Hardware Reset Pin/Sector Protect Unlock
m
Read/Busy output
Power Supply Pin (+5V)
co
Hardware Write Protect/Acceleration Pin
Ground Pin
9 9
2 8 9 9