Chipset Configuration - Asus DSBV-DX User Manual

4.4.2

Chipset Configuration

This menu shows the chipset configuration settings. Select an item then press
<Enter> to display a pop-up menu with the configuration options.
Advanced
Crystal Beach Configure Enable
SERR signal condition
Demand Scrub Enable
Patrol Scrub Enable
4GB PCI Hole Granularity
Memory Branch Mode
Branch 0 Rank Interleave
Branch 0 Rank Sparing
Enhanced x8 Detection
Force ITK Config Clocking
FBDIMM(s) Thermal Throttling
Open Loop Type
Environment Temperature
F1 Help
↑↓
ESC Exit
→←
Scroll down to display the following items:
Temperature Rise
FBDIMM(s) Air Flow
F1:Help
↑↓
ESC: Exit →← : Select Menu
Crystal Beach Configure Enable [Enabled]
Allows you to enable or disable the Configuration/Memory mapped accesses
to the Crystal Beach Configuration space located in Device 8, Fn 0, and Fn 1.
Configuration options: [Disabled] [Enabled]
SERR signal condition [None]
Allows you to select the ECC error that the SERR# asserts.
Configuration options: [None] [Single bit] [Multiple bit] [Both]
Demand Scrub Enable [Enabled]
Enables or disables the Demand Scrubbing.
Configuration options: [Disabled] [Enabled]
Patrol Scrub Enable [Enabled]
Enables or disables the Patrol Scrubbing.
Configuration options: [Disabled] [Enabled]
4GB PCI Hole Granularity [256 MB]
Allows you to select the granularity of the PCI hole for PCI resource.
Configuration options: [256 MB] [512 MB] [1.0 GB] [2.0 GB]
ASUS DSBV-DX Series
PhoenixBIOS Setup Utility
Chipset Configuration
Select Item -/+
Select Menu Enter
Chipset Configuration
: Select Item
Enter: Select SubMenu
[Enabled]
[None]
[Enabled]
[Enabled]
[256 MB]
[Interleave]
[4:1]
[Disabled]
[Enabled]
[Disabled]
[Closed Loop]
[User Define]
[25 °C]
Change Values
Select Sub-Menu
[25 °C]
[2.0]
-/+: Change Value
Item Specific Help
Enable Configuration/
Memory mapped accesses
to the Crystal Beach
Configuration space
located in
Device 8, Fn 0, and Fn 1.
F9 Setup Defaults
F10 Save and Exit
Item Specific Help
F5: Setup Defaults
F10: Save and Exit
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